Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach / [electronic resource] :
edited by William Fornaciari, Dimitrios Soudris.
- 1st ed. 2019.
- X, 325 p. 166 illus., 134 illus. in color. online resource.
Introduction -- Multi-Many core Systems -- Reliability Issues -- HARPA Multi-layer METHODOLOGY: HARPA OS + HARPA RTE -- Reliability and mitigation strategies in HARPA: Modeling -- Reliability and mitigation strategies in HARPA: Mitigation -- Knobs/Monitors -- Event-based Thermal Control -- Power aware design of On-chip communication -- OS –Based Management -- Sensing application -- FLOREON application -- Landslide application -- Conclusions.
This book describes the state-of-the art of industrial and academic research in the architectural design of heterogeneous, multi/many-core processors. The authors describe methods and tools to enable next-generation embedded and high-performance heterogeneous processors to confront cost-effectively the inevitable variations by providing Dependable-Performance: correct functionality and timing guarantees throughout the expected lifetime of a platform under thermal, power, and energy constraints. Various aspects of the reliability problem are discussed, at both the circuit and architecture level, the intelligent selection of knobs and monitors in multicore platforms, and systematic design methodologies. The authors demonstrate how new techniques have been applied in real case studies from different applications domain and report on results and conclusions of those experiments. Enables readers to develop performance-dependable heterogeneous multi/many-core architectures Describes system software designs that support high performance dependability requirements Discusses and analyzes low level methodologies to tradeoff conflicting metrics, i.e. power, performance, reliability and thermal management Includes new application design guidelines to improve performance dependability.
9783319919621
10.1007/978-3-319-91962-1 doi
Electronic circuits.
Microprocessors.
Computer architecture.
Logic design.
Electronic Circuits and Systems.
Processor Architectures.
Logic Design.
TK7867-7867.5
621.3815
Introduction -- Multi-Many core Systems -- Reliability Issues -- HARPA Multi-layer METHODOLOGY: HARPA OS + HARPA RTE -- Reliability and mitigation strategies in HARPA: Modeling -- Reliability and mitigation strategies in HARPA: Mitigation -- Knobs/Monitors -- Event-based Thermal Control -- Power aware design of On-chip communication -- OS –Based Management -- Sensing application -- FLOREON application -- Landslide application -- Conclusions.
This book describes the state-of-the art of industrial and academic research in the architectural design of heterogeneous, multi/many-core processors. The authors describe methods and tools to enable next-generation embedded and high-performance heterogeneous processors to confront cost-effectively the inevitable variations by providing Dependable-Performance: correct functionality and timing guarantees throughout the expected lifetime of a platform under thermal, power, and energy constraints. Various aspects of the reliability problem are discussed, at both the circuit and architecture level, the intelligent selection of knobs and monitors in multicore platforms, and systematic design methodologies. The authors demonstrate how new techniques have been applied in real case studies from different applications domain and report on results and conclusions of those experiments. Enables readers to develop performance-dependable heterogeneous multi/many-core architectures Describes system software designs that support high performance dependability requirements Discusses and analyzes low level methodologies to tradeoff conflicting metrics, i.e. power, performance, reliability and thermal management Includes new application design guidelines to improve performance dependability.
9783319919621
10.1007/978-3-319-91962-1 doi
Electronic circuits.
Microprocessors.
Computer architecture.
Logic design.
Electronic Circuits and Systems.
Processor Architectures.
Logic Design.
TK7867-7867.5
621.3815