Generating Analog IC Layouts with LAYGEN II (Record no. 53252)

000 -LEADER
fixed length control field 02419nam a22005295i 4500
001 - CONTROL NUMBER
control field 978-3-642-33146-6
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200420221302.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 131212s2013 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783642331466
-- 978-3-642-33146-6
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Martins, Ricardo M. F.
245 10 - TITLE STATEMENT
Title Generating Analog IC Layouts with LAYGEN II
300 ## - PHYSICAL DESCRIPTION
Number of Pages XI, 98 p.
490 1# - SERIES STATEMENT
Series statement SpringerBriefs in Applied Sciences and Technology,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- State of the Art on Analog Layout Automation -- Automatic Layout Generation -- Router -- Results -- Conclusions and Future Work -- References.
520 ## - SUMMARY, ETC.
Summary, etc This book presents an innovative methodology for the automatic generation of analog integrated circuits (ICs) layout, based on template descriptions and on evolutionary computational techniques. A design automation tool, LAYGEN II, was implemented to validate the proposed approach giving special emphasis to reusability of expert design knowledge and to efficiency on retargeting operations.
700 1# - AUTHOR 2
Author 2 Louren�co, Nuno C. C.
700 1# - AUTHOR 2
Author 2 Horta, Nuno C. G.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-642-33146-6
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg :
-- Imprint: Springer,
-- 2013.
336 ## -
-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
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-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Artificial intelligence.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Applied mathematics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering mathematics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Artificial Intelligence (incl. Robotics).
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Appl.Mathematics/Computational Methods of Engineering.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 2191-530X
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-- ZDB-2-ENG

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