Advanced Hardware Design for Error Correcting Codes (Record no. 55290)

000 -LEADER
fixed length control field 03401nam a22004815i 4500
001 - CONTROL NUMBER
control field 978-3-319-10569-7
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421111836.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 141030s2015 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319105697
-- 978-3-319-10569-7
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
245 10 - TITLE STATEMENT
Title Advanced Hardware Design for Error Correcting Codes
300 ## - PHYSICAL DESCRIPTION
Number of Pages IX, 192 p. 81 illus., 25 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 User Needs -- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding -- Implementation of Polar Decoders -- Parallel architectures for Turbo Product Codes Decoding -- VLSI implementations of sphere detectors -- Stochastic Decoders for LDPC Codes -- MP-SoC/NoC architectures for error correction -- ASIP design for multi-standard channel decoders -- Hardware design of parallel interleaver architecture: a survey.                                                                                                                                       .
520 ## - SUMMARY, ETC.
Summary, etc This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book's chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques. Advanced Hardware Design for Error Correcting Codes includes a foreword by Claude Berrou.
700 1# - AUTHOR 2
Author 2 Chavet, Cyrille.
700 1# - AUTHOR 2
Author 2 Coussy, Philippe.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-319-10569-7
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2015.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computers.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electrical engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Communications Engineering, Networks.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Information Systems and Communication Service.
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-- ZDB-2-ENG

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