Reversible Computation (Record no. 55850)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03862nam a22005655i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-642-36315-3 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421111846.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 130125s2013 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783642363153 |
| -- | 978-3-642-36315-3 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.395 |
| 245 10 - TITLE STATEMENT | |
| Title | Reversible Computation |
| Sub Title | 4th International Workshop, RC 2012, Copenhagen, Denmark, July 2-3, 2012. Revised Papers / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | X, 241 p. 70 illus. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Theoretical Considerations -- Tutorial: Graphical Calculus for Quantum Circuits -- One-Way Reversible Multi-head Finite Automata -- A Deterministic Two-Way Multi-head Finite Automaton Can Be Converted into a Reversible One with the Same Number of Heads -- Undecidability of the Surjectivity of the Subshift Associated to a Turing Machine -- Reversible Software and Languages Isomorphic Interpreters from Logically Reversible Abstract Machines -- Synthesizing Loops for Program Inversion -- Frugal Encoding in Reversible MOQA: A Case Study for Quicksort -- Towards a General-Purpose, Reversible Language for Controlling Self-reconfigurable Robots -- Reversible and Quantum Circuits -- Reversible and Quantum Circuit Optimization: A Functional Approach -- Properties of Quantum Templates -- Optimal 4-bit Reversible Mixed-Polarity Toffoli Circuits -- Design of an Online Testable Ternary Circuit from the Truth Table -- Physical Realizations and Design Garbageless Reversible Implementation of Integer Linear Transformations -- Garbage-Free Reversible Integer Multiplication with Constants of the Form 2k � 2l � 1 -- Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams -- Using (Ss(BDDs in the Design of Reversible Circuits (Work-In-Progress) -- Distributed Systems -- A Verification Technique for Reversible Process Algebra -- A Reversible Process Calculus and the Modelling of the ERK Signalling Pathway -- Controlled Reversibility and Compensations. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book constitutes the refereed proceedings of the 4th International Workshop on Reversible Computation, RC 2012, held in Copenhagen, Denmark, in July 2012. The 19 contributions presented in this volume were carefully reviewed and selected from 46 submissions. The papers cover theoretical considerations, reversible software and reversible hardware, and physical realizations and applications in quantum computing. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Gl�uck, Robert. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Yokoyama, Tetsuo. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-642-36315-3 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg : |
| -- | Imprint: Springer, |
| -- | 2013. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computers. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Algorithms. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer logic. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic Design. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logics and Meanings of Programs. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computation by Abstract Devices. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Algorithm Analysis and Problem Complexity. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Software Engineering. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 0302-9743 ; |
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| -- | ZDB-2-SCS |
| 912 ## - | |
| -- | ZDB-2-LNC |
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