Noise-Shaping All-Digital Phase-Locked Loops (Record no. 57818)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03265nam a22005055i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-03659-5 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421112228.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 131217s2014 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319036595 |
| -- | 978-3-319-03659-5 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Brandonisio, Francesco. |
| 245 10 - TITLE STATEMENT | |
| Title | Noise-Shaping All-Digital Phase-Locked Loops |
| Sub Title | Modeling, Simulation, Analysis and Design / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XIII, 177 p. 145 illus., 79 illus. in color. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Analog Circuits and Signal Processing, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Introduction -- Phase Digitization in All-Digital PLLs -- A Unifying Framework for TDC Architectures -- Analytical Predictions of Phase Noise in ADPLLs -- Advantages of Noise Shaping and Dither -- Efficient Modeling and Simulation of Accumulator-Based ADPLLs -- Modelling and Estimating Phase Noise with Matlab. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book. • Discusses in detail a wide range of all-digital phase-locked loops architectures; • Presents a unified framework in which to model time-to-digital converters for ADPLLs; • Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs; • Describes an efficient approach to model ADPLLS; • Includes Matlab code to reproduce the examples in the book. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Kennedy, Michael Peter. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-319-03659-5 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2014. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronics. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microelectronics. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Signal, Image and Speech Processing. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronics and Microelectronics, Instrumentation. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 1872-082X |
| 912 ## - | |
| -- | ZDB-2-ENG |
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