Architecture of Computing Systems - ARCS 2016 (Record no. 59116)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 05916nam a22006375i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-30695-7 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421112555.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 160330s2016 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319306957 |
| -- | 978-3-319-30695-7 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 004.6 |
| 245 10 - TITLE STATEMENT | |
| Title | Architecture of Computing Systems - ARCS 2016 |
| Sub Title | 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2016. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XX, 402 p. 164 illus. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Configurable and In-Memory Accelerators -- Towards Multicore Performance with Configurable Computing Units -- Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube -- Network-on-Chip and Secure Computing Architectures -- CASCADE: Congestion Aware Switchable Cycle Adaptive Detection Router -- An Alternating Transmission Scheme for Detection Routing based Network-on-Chips -- Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure -- Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA -- Cache Architectures and Protocols Adaptive Cache Structures -- Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence -- Mapping of Applications on Heterogeneous -- Architectures and Real-Time Tasks on Multiprocessors Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines -- GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing -- Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments -- Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems -- All About Time: Timing, Tracing, and Performance Modeling Data Age Diminution in the Logical Execution Time Model -- Accurate Sample Time Reconstruction for Sensor Data Synchronization -- DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip -- Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks -- Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units -- Approximate and Energy-Efficient Computing -- Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion -- Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector -- Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling -- Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting -- Allocation: From Memories to FPGA Hardware Modules Reducing NoC and Memory Contention for Manycores -- An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration -- Organic Computing Systems Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems -- Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems -- Augmenting the Algorithmic Structure of XCS by Means of Interpolation -- Reliability Aspects in NoCs, Caches, and GPUs Estimation of End-to-end Packet Error Rates for NoC Multicasts -- Protecting Code Regions on Asymmetrically Reliable Caches -- A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book constitutes the proceedings of the 29th International Conference on Architecture of Computing Systems, ARCS 2016, held in Nuremberg, Germany, in April 2016. The 29 full papers presented in this volume were carefully reviewed and selected from 87 submissions. They were organized in topical sections named: configurable and in-memory accelerators; network-on-chip and secure computing architectures; cache architectures and protocols; mapping of applications on heterogeneous architectures and real-time tasks on multiprocessors; all about time: timing, tracing, and performance modeling; approximate and energy-efficient computing; allocation: from memories to FPGA hardware modules; organic computing systems; and reliability aspects in NoCs, caches, and GPUs. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Hannig, Frank. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Cardoso, Jo�ao M. P. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Pionteck, Thilo. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Fey, Dietmar. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Schr�oder-Preikschat, Wolfgang. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Teich, J�urgen. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-319-30695-7 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2016. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
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| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer communication systems. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Architecture, Computer. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computers. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Algorithms. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Communication Networks. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer System Implementation. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Algorithm Analysis and Problem Complexity. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Information Systems Applications (incl. Internet). |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computation by Abstract Devices. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 0302-9743 ; |
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