Junctionless Field-Effect Transistors : (Record no. 69014)

000 -LEADER
fixed length control field 07469cam a2200625Ki 4500
001 - CONTROL NUMBER
control field on1083521812
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220711203459.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 190128s2019 njua ob 001 0 eng d
019 ## -
-- 1083713890
-- 1084441991
-- 1085699194
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9781119523512
-- (electronic book)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 1119523516
-- (electronic book)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9781119523543
-- (electronic book)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 1119523540
-- (electronic book)
029 1# - (OCLC)
OCLC library identifier AU@
System control number 000065043718
029 1# - (OCLC)
OCLC library identifier AU@
System control number 000065193794
029 1# - (OCLC)
OCLC library identifier CHNEW
System control number 001039320
029 1# - (OCLC)
OCLC library identifier CHVBK
System control number 559027834
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815/284
100 1# - AUTHOR NAME
Author Sahay, Shubham,
245 10 - TITLE STATEMENT
Title Junctionless Field-Effect Transistors :
Sub Title Design, Modeling, and Simulation /
300 ## - PHYSICAL DESCRIPTION
Number of Pages 1 online resource
490 1# - SERIES STATEMENT
Series statement IEEE Press series on microelectronic systems
520 ## - SUMMARY, ETC.
Summary, etc A comprehensive one-volume reference on current JLFET methods, techniques, and research Advancements in transistor technology have driven the modern smart-device revolution-many cell phones, watches, home appliances, and numerous other devices of everyday usage now surpass the performance of the room-filling supercomputers of the past. Electronic devices are continuing to become more mobile, powerful, and versatile in this era of internet-of-things (IoT) due in large part to the scaling of metal-oxide semiconductor field-effect transistors (MOSFETs). Incessant scaling of the conventional MOSFETs to cater to consumer needs without incurring performance degradation requires costly and complex fabrication process owing to the presence of metallurgical junctions. Unlike conventional MOSFETs, junctionless field-effect transistors (JLFETs) contain no metallurgical junctions, so they are simpler to process and less costly to manufacture. JLFETs utilize a gated semiconductor film to control its resistance and the current flowing through it. Junctionless Field-Effect Transistors: Design, Modeling, and Simulation is an inclusive, one-stop reference on the study and research on JLFETs This timely book covers the fundamental physics underlying JLFET operation, emerging architectures, modeling and simulation methods, comparative analyses of JLFET performance metrics, and several other interesting facts related to JLFETs. A calibrated simulation framework, including guidance on SentaurusTCAD software, enables researchers to investigate JLFETs, develop new architectures, and improve performance. This valuable resource: -Addresses the design and architecture challenges faced by JLFET as a replacement for MOSFET -Examines various approaches for analytical and compact modeling of JLFETs in circuit design and simulation -Explains how to use Technology Computer-Aided Design software (TCAD) to produce numerical simulations of JLFETs -Suggests research directions and potential applications of JLFETs Junctionless Field-Effect Transistors: Design, Modeling, and Simulation is an essential resource for CMOS device design researchers and advanced students in the field of physics and semiconductor devices.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Intro; Junctionless Field-Effect Transistors; Contents; Preface; 1 Introduction to Field-Effect Transistors; 1.1 Transistor Action; 1.2 Metal-Oxide-Semiconductor Field-Effect Transistors; 1.2.1 "Field-Effect" and Operation Modes; 1.2.2 MOSFET as a Switch; 1.2.3 Transfer Characteristics and Output Characteristics; 1.3 MOSFET Circuits: The Need for Complementary MOS; 1.3.1 CMOS Inverter; 1.3.2 Power Dissipation in CMOS Inverter; 1.4 The Need for CMOS Scaling; 1.5 Moore's Law; 1.6 Koomey's Law; 1.7 Challenges in Scaling the MOSFET; 1.7.1 Short-Channel Effects; 1.7.2 Hot Electron Effect
505 8# - FORMATTED CONTENTS NOTE
Remark 2 1.7.3 Gate-Induced Drain Leakage1.7.4 Direct Source to Drain Tunneling; 1.7.5 Boltzmann Tyranny; 1.7.6 Ultrasteep Doping Profile; 1.8 Conclusion; References; 2 Emerging FET Architectures; 2.1 Tunnel FETs; 2.1.1 Structure; 2.1.2 Operation; 2.1.3 Challenges; 2.2 Impact Ionization MOSFET; 2.2.1 Structure; 2.2.2 Operation and Characteristics; 2.2.3 Challenges; 2.3 BIPOLAR I-MOS; 2.3.1 Structure; 2.3.2 Operation and Characteristics; 2.3.3 Challenges; 2.4 Negative capacitance FETs; 2.4.1 Negative Capacitance in Ferroelectric Materials; 2.4.2 Structure; 2.4.3 Operation and Characteristics
505 8# - FORMATTED CONTENTS NOTE
Remark 2 2.4.4 Challenges2.5 Two-Dimensional FETs; 2.5.1 Structure; 2.5.2 Operation; 2.5.3 Challenges; 2.6 Nanowire FETs; 2.6.1 Structure and Characteristics; 2.6.2 Gate-Induced Drain Leakage; 2.6.3 Challenges; 2.7 Nanotube FETs; 2.7.1 Structure; 2.7.2 Operation and Characteristics; 2.7.3 Gate-Induced Drain Leakage; 2.7.4 Dynamic Performance; 2.7.5 Impact of Spacer Material; 2.7.6 Impact of Core Diameter; 2.7.7 Challenges; 2.8 Conclusion; References; 3 Fundamentals of Junctionless Field-Effect Transistors; 3.1 Device Structure; 3.2 Operation; 3.2.1 Full Depletion; 3.2.2 Partial Depletion
505 8# - FORMATTED CONTENTS NOTE
Remark 2 3.2.3 Flat Band Condition3.2.4 Accumulation; 3.3 Design Parameters; 3.3.1 Fabrication Flow; 3.4 Parameters that Affect the Performance; 3.4.1 Mobility; 3.4.2 Impact of Strain on Mobility; 3.4.3 Carrier Ballisticity; 3.4.4 Temperature Dependence; 3.4.5 Bias Temperature Instability; 3.4.6 Low-Frequency Noise; 3.4.7 Short-Channel Effects; 3.5 Beyond Silicon JLFETs: Other Materials; 3.5.1 Germanium JLFETs; 3.5.2 Indium Gallium Arsenide JLFETs; 3.5.3 Gallium Nitride JLFETs; 3.6 Challenges; 3.6.1 High Source/Drain Series Resistance; 3.6.2 Random Dopant Fluctuations; 3.6.3 RDF in JLFETs
505 8# - FORMATTED CONTENTS NOTE
Remark 2 3.6.4 Sensitivity to Process Variations3.6.5 Fabrication Issues; 3.6.6 Band-to-Band Tunneling in OFF-State; 3.7 Conclusion; References; 4 Device Architectures to Mitigate Challenges in Junctionless Field-Effect Transistors; 4.1 Junctionless Accumulation-Mode Field-Effect Transistors; 4.1.1 Structure; 4.1.2 Operation; 4.1.3 Challenges; 4.2 Realizing Efficient Volume Depletion; 4.3 SOI JLFET With A High- Box; 4.3.1 Structure; 4.3.2 Transfer Characteristics; 4.3.3 Operation; 4.3.4 Impact of Gate Length Scaling; 4.3.5 Impact of BOX Thickness and Ground Plane Doping; 4.3.6 Impact of Traps
650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1
General subdivision Mechanical.
700 1# - AUTHOR 2
Author 2 Kumar, Mamidala Jagadesh,
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1002/9781119523543
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Hoboken, New Jersey :
-- John Wiley & Sons Inc.,
-- [2019]
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
588 0# -
-- Online resource; title from digital title page (viewed on March 20, 2019).
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Metal semiconductor field-effect transistors.
650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1
-- TECHNOLOGY & ENGINEERING
650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Metal semiconductor field-effect transistors.
-- (OCoLC)fst01017679
994 ## -
-- 92
-- DG1

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