Integrated circuit manufacturability : (Record no. 73915)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 05299nam a2201009 i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 5265097 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220712205654.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 100317t20151999njua ob 001 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9780470544921 |
| -- | electronic |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| -- | |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| -- | electronic |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 245 00 - TITLE STATEMENT | |
| Title | Integrated circuit manufacturability : |
| Sub Title | the art of process and design integration / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 1 PDF (xv, 316 pages) : |
| 500 ## - GENERAL NOTE | |
| Remark 1 | "IEEE Circuits and Systems Society, sponsor." |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Preface. Introduction (Jose Pineda de Gyvez). Defect Monitoring and Characterization (Eric Bruls). Digital CMOS Fault Modeling and Inductive Fault Analysis (Manoj Sachdev). Functional Yield Modeling (Gary C. Cheek and Geoff O'Donoghue). Critical Area and Fault Probability Prediction (D.M.H. Walker). Statistical Methods of Parametric Yield and Quality Enhancement (Maciej Styblinski). Architectural Fault Tolerance (S.K. Tewksbury). Design for Test and Manufacturability (Dhiraj Pradhan and Adit Singh). Testing Solutions for MCM Manufacturing (Yervant Zorian). Index. About the Editors. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | "INTEGRATED CIRCUIT MANUFACTURABILITY provides comprehensive coverage of the process and design variables that determine the ease and feasibility of fabrication (or manufacturability) of contemporary VLSI systems and circuits. This book progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage. INTEGRATED CIRCUIT MANUFACTURABILITY illustrates the implications of manufacturability at every level of abstraction, including the effects of defects on the layout, their mapping to electrical faults, and the corresponding approaches to detect such faults. The reader will be introduced to key practical issues normally applied in industry and usually required by quality, product, and design engineering departments in today's design practices: * Yield management strategies * Effects of spot defects * Inductive fault analysis and testing * Fault-tolerant architectures and MCM testing strategies. This book will serve design and product engineers both from academia and industry. It can also be used as a reference or textbook for introductory graduate-level courses on manufacturing.". |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| Subject | Integrated circuits |
| General subdivision | Computer-aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| Subject | Metal oxide semiconductors, Complementary |
| General subdivision | Computer-aided design. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| Subject | Integrated circuits |
| General subdivision | Testing. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Pradhan, Dhiraj K. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Pineda de Gyvez, Jos�e. |
| 856 42 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5265097 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Piscataway, New Jersey : |
| -- | IEEE Press, |
| -- | c1999. |
| 264 #2 - | |
| -- | [Piscataqay, New Jersey] : |
| -- | IEEE Xplore, |
| -- | [1998] |
| 336 ## - | |
| -- | text |
| -- | rdacontent |
| 337 ## - | |
| -- | electronic |
| -- | isbdmedia |
| 338 ## - | |
| -- | online resource |
| -- | rdacarrier |
| 588 ## - | |
| -- | Description based on PDF viewed 12/21/2015. |
| 695 ## - | |
| -- | Delay |
| 695 ## - | |
| -- | Digital signal processing |
| 695 ## - | |
| -- | Fault tolerance |
| 695 ## - | |
| -- | Fault tolerant systems |
| 695 ## - | |
| -- | Indexes |
| 695 ## - | |
| -- | Integrated circuit modeling |
| 695 ## - | |
| -- | Integrated circuits |
| 695 ## - | |
| -- | Layout |
| 695 ## - | |
| -- | Lithography |
| 695 ## - | |
| -- | Logic gates |
| 695 ## - | |
| -- | Maintenance engineering |
| 695 ## - | |
| -- | Manufacturing |
| 695 ## - | |
| -- | Manufacturing processes |
| 695 ## - | |
| -- | Materials |
| 695 ## - | |
| -- | Mathematical model |
| 695 ## - | |
| -- | Metals |
| 695 ## - | |
| -- | Mobile communication |
| 695 ## - | |
| -- | Monitoring |
| 695 ## - | |
| -- | Probes |
| 695 ## - | |
| -- | Production |
| 695 ## - | |
| -- | RLC circuits |
| 695 ## - | |
| -- | Random variables |
| 695 ## - | |
| -- | Reliability |
| 695 ## - | |
| -- | Sections |
| 695 ## - | |
| -- | Semiconductor device modeling |
| 695 ## - | |
| -- | Solid modeling |
| 695 ## - | |
| -- | Statistical analysis |
| 695 ## - | |
| -- | Substrates |
| 695 ## - | |
| -- | Testing |
| 695 ## - | |
| -- | Very large scale integration |
| 695 ## - | |
| -- | Assembly |
| 695 ## - | |
| -- | Atmospheric modeling |
| 695 ## - | |
| -- | Biographies |
| 695 ## - | |
| -- | CMOS integrated circuits |
| 695 ## - | |
| -- | Circuit faults |
| 695 ## - | |
| -- | Circuit optimization |
| 695 ## - | |
| -- | Circuit synthesis |
| 695 ## - | |
| -- | Computational modeling |
| 695 ## - | |
| -- | Contamination |
No items available.