Automated Analysis of Virtual Prototypes at the Electronic System Level (Record no. 75753)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03559nam a22005415i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-030-44282-8 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220801213923.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 200504s2020 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783030442828 |
| -- | 978-3-030-44282-8 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Goli, Mehran. |
| 245 10 - TITLE STATEMENT | |
| Title | Automated Analysis of Virtual Prototypes at the Electronic System Level |
| Sub Title | Design Understanding and Applications / |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2020. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XXI, 166 p. 53 illus. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Chapter 1. Introduction -- Chapter 2. Background -- Chapter 3. Design Understanding Methodology -- Chapter 4. Application I: Verification -- Chapter 5. Application II: Security Validation -- Chapter 6. Application III: Design Space Exploration -- Chapter 7. Conclusion. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book describes a set of SystemC‐based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process. Provides an extensive introduction to the field of SystemC‐based virtual prototype (VP) analysis at the electronic system level; Describes a design understanding methodology from both debugger-based and compiler‐based perspectives; Illustrates a semi‐formal verification approach to check the validity of a given VP against its specification, user‐defined rules and protocol; Discusses a security validation approach to validate the run‐time behavior of a given VP-based SoC against security threat models, such as information leakage (confidentiality) and unauthorized access to data in a memory (integrity); Describes a design space exploration approach for SystemC-based VPs to guide designers to know under which error limits, different portions of a given VP can be approximated at different granularity levels. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Drechsler, Rolf. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-030-44282-8 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2020. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Cooperating objects (Computer systems). |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Cyber-Physical Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 912 ## - | |
| -- | ZDB-2-SXE |
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