Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission (Record no. 76624)

000 -LEADER
fixed length control field 03584nam a22005415i 4500
001 - CONTROL NUMBER
control field 978-3-030-10958-5
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801214659.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 190130s2019 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783030109585
-- 978-3-030-10958-5
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Markulic, Nereo.
245 10 - TITLE STATEMENT
Title Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2019.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XXIII, 138 p. 97 illus., 23 illus. in color.
490 1# - SERIES STATEMENT
Series statement Analog Circuits and Signal Processing,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Chapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.
520 ## - SUMMARY, ETC.
Summary, etc This book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today’s art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results.
700 1# - AUTHOR 2
Author 2 Raczkowski, Kuba.
700 1# - AUTHOR 2
Author 2 Craninckx, Jan.
700 1# - AUTHOR 2
Author 2 Wambacq, Piet.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-030-10958-5
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2019.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 2197-1854
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-- ZDB-2-ENG
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-- ZDB-2-SXE

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