Fault Tolerant Architectures for Cryptography and Hardware Security (Record no. 78700)

000 -LEADER
fixed length control field 03570nam a22005655i 4500
001 - CONTROL NUMBER
control field 978-981-10-1387-4
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801220550.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 180329s2018 si | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9789811013874
-- 978-981-10-1387-4
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
245 10 - TITLE STATEMENT
Title Fault Tolerant Architectures for Cryptography and Hardware Security
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2018.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XII, 240 p. 75 illus., 39 illus. in color.
490 1# - SERIES STATEMENT
Series statement Computer Architecture and Design Methodologies,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction to Fault Analysis -- Classical Fault Analysis -- Recent Trends and Advances in Fault Analysis -- Automation of Fault Analysis -- Countermeasures and Fault Tolerant Architectures -- Practical Perspectives of Fault Tolerant Design.
520 ## - SUMMARY, ETC.
Summary, etc This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods. It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results.
700 1# - AUTHOR 2
Author 2 PATRANABIS, SIKHAR.
700 1# - AUTHOR 2
Author 2 Mukhopadhyay, Debdeep.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-981-10-1387-4
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Singapore :
-- Springer Nature Singapore :
-- Imprint: Springer,
-- 2018.
336 ## -
-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Cryptography.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Data encryption (Computer science).
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Security systems.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Cryptology.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Security Science and Technology.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 2367-3486
912 ## -
-- ZDB-2-ENG
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-- ZDB-2-SXE

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