New Data Structures and Algorithms for Logic Synthesis and Verification (Record no. 81078)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03178nam a22005295i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-43174-1 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220801222721.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 160802s2017 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319431741 |
| -- | 978-3-319-43174-1 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Amaru, Luca Gaetano. |
| 245 10 - TITLE STATEMENT | |
| Title | New Data Structures and Algorithms for Logic Synthesis and Verification |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2017. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XVI, 156 p. 44 illus., 20 illus. in color. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Introduction -- Part 1. Logic Representation, Manipulation and Optimization -- Biconditional Logic -- Majority Logic -- Part 2. Logic Satisfiability and Equivalence Checking -- Exploiting Logic Properties to Speedup SAT -- Majority Normal Form Representation and Satisfiability -- Improvements to the Equivalence Checking of Reversible Circuits -- Conclusions. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines. · Provides a comprehensive, theoretical study on majority and biconditional logic for logic synthesis; · Updates the current scenario in synthesis and verification – especially in light of emerging technologies; · Demonstrates applications to CMOS technology and emerging technologies. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-319-43174-1 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2017. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic design. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic Design. |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 912 ## - | |
| -- | ZDB-2-SXE |
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