A Primer on Memory Consistency and Cache Coherence (Record no. 84744)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03635nam a22005175i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-031-01733-9 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240730163550.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 221028s2011 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783031017339 |
| -- | 978-3-031-01733-9 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Sorin, Daniel. |
| 245 12 - TITLE STATEMENT | |
| Title | A Primer on Memory Consistency and Cache Coherence |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2011. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | IV, 212 p. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Synthesis Lectures on Computer Architecture, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Preface -- Introduction to Consistency and Coherence -- Coherence Basics -- Memory Consistency Motivation and Sequential Consistency -- Total Store Order and the x86 Memory Model -- Relaxed Memory Consistency -- Coherence Protocols -- Snooping Coherence Protocols -- Directory Coherence Protocols -- Advanced Topics in Coherence -- Author Biographies. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | Many modern computer systems and most multicore chips (chip multiprocessors) support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the architecturally visible behavior of its memory system. Consistency definitions provide rules about loads and stores (or memory reads and writes) and how they act upon memory. As part of supporting a memory consistency model, many machines also provide cache coherence protocols that ensure that multiple cached copies of data are kept up-to-date. The goal of this primer is to provide readers with a basic understanding of consistency and coherence. This understanding includes both the issues that must be solved as well as a variety of solutions. We present both highlevel concepts as well as specific, concrete examples from real-world systems. Table of Contents: Preface / Introduction to Consistency and Coherence / Coherence Basics / Memory Consistency Motivation and Sequential Consistency / Total Store Order and the x86 Memory Model / Relaxed Memory Consistency / Coherence Protocols / Snooping Coherence Protocols / Directory Coherence Protocols / Advanced Topics in Coherence / Author Biographies. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Hill, Mark. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Wood, David. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-031-01733-9 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2011. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 1935-3243 |
| 912 ## - | |
| -- | ZDB-2-SXSC |
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