Efficient Processing of Deep Neural Networks (Record no. 84901)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03764nam a22005415i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-031-01766-7 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240730163717.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220601s2020 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783031017667 |
| -- | 978-3-031-01766-7 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Sze, Vivienne. |
| 245 10 - TITLE STATEMENT | |
| Title | Efficient Processing of Deep Neural Networks |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2020. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XXI, 254 p. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Synthesis Lectures on Computer Architecture, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Preface -- Acknowledgments -- Introduction -- Overview of Deep Neural Networks -- Key Metrics and Design Objectives -- Kernel Computation -- Designing DNN Accelerators -- Operation Mapping on Specialized Hardware -- Reducing Precision -- Exploiting Sparsity -- Designing Efficient DNN Models -- Advanced Technologies -- Conclusion -- Bibliography -- Authors' Biographies. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book provides a structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks (DNNs). DNNs are currently widely used for many artificial intelligence (AI) applications, including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Therefore, techniques that enable efficient processing of deep neural networks to improve key metrics-such as energy-efficiency, throughput, and latency-without sacrificing accuracy or increasing hardware costs are critical to enabling the wide deployment of DNNs in AI systems. The book includes background on DNN processing; a description and taxonomy of hardware architectural approaches for designing DNN accelerators; key metrics for evaluating and comparing different designs; features of DNN processing that are amenable to hardware/algorithm co-design to improve energy efficiency and throughput; and opportunities for applying new technologies. Readers will find a structured introduction to the field as well as formalization and organization of key concepts from contemporary work that provide insights that may spark new ideas. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Chen, Yu-Hsin. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Yang, Tien-Ju. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Emer, Joel S. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-031-01766-7 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2020. |
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| -- | text |
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| -- | computer |
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| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
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| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
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| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 1935-3243 |
| 912 ## - | |
| -- | ZDB-2-SXSC |
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