Die-stacking Architecture (Record no. 85628)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 02941nam a22005055i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-031-01747-6 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240730164355.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220601s2015 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783031017476 |
| -- | 978-3-031-01747-6 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Xie, Yuan. |
| 245 10 - TITLE STATEMENT | |
| Title | Die-stacking Architecture |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2015. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XIV, 113 p. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Synthesis Lectures on Computer Architecture, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Preface -- Acknowledgments -- 3D Integration Technology -- Benefits of 3D Integration -- Fine-granularity 3D Processor Design -- Coarse-granularity 3D Processor Design -- 3D GPU Architecture -- 3D Network-on-Chip -- Thermal Analysis and Thermal-aware Design -- Cost Analysis for 3D ICs -- Conclusion -- Bibliography . |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Zhao, Jishen. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-031-01747-6 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2015. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 1935-3243 |
| 912 ## - | |
| -- | ZDB-2-SXSC |
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