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High-Bandwidth Memory Interface [electronic resource] / by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song.

By: Kim, Chulwoo [author.].
Contributor(s): Lee, Hyun-Woo [author.] | Song, Junyoung [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: SpringerBriefs in Electrical and Computer Engineering: Publisher: Cham : Springer International Publishing : Imprint: Springer, 2014Description: VIII, 88 p. 91 illus., 41 illus. in color. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783319023816.Subject(s): Engineering | Electronic circuits | Electronics | Microelectronics | Engineering | Circuits and Systems | Electronic Circuits and Devices | Electronics and Microelectronics, InstrumentationAdditional physical formats: Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
An introduction to high-speed DRAM -- An I/O Line Configuration and Organization of DRAM -- Clock generation and distribution -- Transceiver Design -- TSV Interface for DRAM.
In: Springer eBooksSummary: This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.   • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; • Presents state-of-the-art techniques for memory interface design; • Covers memory interface design at both the circuit level and system architecture level.
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An introduction to high-speed DRAM -- An I/O Line Configuration and Organization of DRAM -- Clock generation and distribution -- Transceiver Design -- TSV Interface for DRAM.

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.   • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; • Presents state-of-the-art techniques for memory interface design; • Covers memory interface design at both the circuit level and system architecture level.

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