E-MuCoCoS -- 2016 Workshop on Exascale Multi/Many Core Computing Systems -- Behavioral Emulation for Scalable Design-Space Exploration of Algorithms and Architectures -- Closing the Performance Gap with Modern C++ -- Energy Efficient Runtime Framework for Exascale Systems -- Extreme-Scale In-Situ Visualization of Turbulent Flows on IBM Blue Gene/Q JUQUEEN -- The EPiGRAM Project: Preparing Parallel Programming Models for Exascale -- Work Distribution of Data-parallel Applications on Heterogeneous Systems -- ExaComm -- Reducing manipulation overhead of remote data-structure by controlling remote memory access order -- SONAR: Automated Communication Characterization for HPC Applications -- HPC-IODC -- HPC I/O in the Data Center Workshop -- An Overview of the Sirocco Parallel Storage System -- Analyzing Data Properties using Statistical Sampling Techniques -- Illustrated on Scientific File Formats and Compression Features -- Delta: Data Reduction for Integrated Application Workflows and Data Storage -- Investigating Read Performance of Python and NetCDF4 when using HPC Parallel Filesystems -- IWOPH -- International Workshop on OpenPOWER for HPC -- Early Application Performance at the Hartree Centre with the OpenPOWER Architecture -- Early Experiences Porting the NAMD and VMD Molecular Simulation and Analysis Software to GPU-Accelerated OpenPOWER Platforms -- Exploring Energy Efficiency for GPU-Accelerated POWER Servers -- First Experiences with ab initio Molecular Dynamics on OpenPOWER: The Case of CPMD -- High Performance Computing on the IBM Power8 platform -- Measuring and Managing Energy in OpenPOWER -- Performance Analysis of Spark/GraphX on POWER8 Cluster -- Performance of the 3D Combustion Simulation code RECOM-AIOLOS on IBM POWER8 architecture -- Performance-Portable Many-Core Plasma Simulations: Porting PIConGPU to OpenPower and Beyond -- IXPUG -- Application Performance on Intel Xeon Phi -- Being Prepared for KNL and Beyond -- A Comparative Study of Application Performance and Scalability on the Intel Knights Landing Processor -- Application Suitability Assessment for Many-Core Targets -- Applying the Rooine Performance Model to the Intel Xeon Phi Knights Landing Processor -- Dynamic SIMD Vector Lane Scheduling -- High performance optimizations for nuclear physics code MFDn on KNL -- Optimization of the sparse matrix-vector products of an IDR Krylov iterative solver in EMGeo for the Intel KNL manycore processor -- Optimizing a Multiple Right-hand Side Dslash Kernel for Intel Knights Corner -- Optimizing Excited-State Electronic-Structure Codes for Intel Knights Landing: a Case Study on the BerkeleyGW Software -- Optimizing Wilson-Dirac operator and linear solvers for Intel KNL -- P^3MA -- First International Workshop on Performance Portable Programming Models for Accelerators Workshop -- A C++ Programming Model for Heterogeneous System Architecture -- Battling Memory Requirements of Array Programming through Streaming -- From Describing to Prescribing Parallelism: Translating the SPEC ACCEL OpenACC Suite to OpenMP Target Directives -- GPU-STREAM v2.0: Benchmarking the achievable memory bandwidth of many-core processors across diverse parallel programming models -- Porting the MPI Parallelized LES Model PALM to Multi-GPU Systems -- an Experience Report -- Software Cost Analysis of GPU-Accelerated Aeroacoustics Simulations in C++ with OpenACC -- Task-Based Cholesky Decomposition on Knights Corner using OpenMP -- Using C++ AMP to accelerate HPC applications on Multiple Platforms -- WOPSSS -- Analysis of Memory Performance: Mixed Rank Performance across Microarchitectures -- Considering I/O Processing in CloudSim for Performance and Energy Evaluation -- Early Evaluation of the "Infinite Memory Engine" Burst Buffer Solution -- Motivation and Implementation of a Dynamic Remote Storage System for I/O demanding HPC Applications -- Parallel I/O Architecture Modelling Based on File System Counters -- User-space I/O for µs - levelstoragedevices -- Scaling Spark on Lustre.

This book constitutes revised selected papers from 7 workshops that were held in conjunction with the ISC High Performance 2016 conference in Frankfurt, Germany, in June 2016. The 45 papers presented in this volume were carefully reviewed and selected for inclusion in this book. They stem from the following workshops: Workshop on Exascale Multi/Many Core Computing Systems, E-MuCoCoS; Second International Workshop on Communication Architectures at Extreme Scale, ExaComm; HPC I/O in the Data Center Workshop, HPC-IODC; International Workshop on OpenPOWER for HPC, IWOPH; Workshop on the Application Performance on Intel Xeon Phi - Being Prepared for KNL and Beyond, IXPUG; Workshop on Performance and Scalability of Storage Systems, WOPSSS; and International Workshop on Performance Portable Programming Models for Accelerators, P3MA.