Power electronic converters for microgrids / Suleiman M. Sharkh...[and others].
Contributor(s): Sharkh, S. M. (Suleiman M.) [author.] | IEEE Xplore (Online Service) [distributor.] | Wiley [publisher.].
Material type: BookPublisher: Singapore : Wiley-IEEE Press, [2014]Distributor: [Piscataqay, New Jersey] : IEEE Xplore, [2014]Description: 1 PDF (352 pages).Content type: text Media type: electronic Carrier type: online resourceISBN: 9780470824054.Subject(s): Electric current converters | Adaptive systems | Bandwidth | Batteries | Capacitance | Capacitors | Circuit faults | Delay effects | Fault currents | Frequency conversion | Fuses | Generators | Harmonic analysis | Impedance | Inductors | Insulated gate bipolar transistors | Inverters | Legged locomotion | Microgrids | Modulation | Oscillators | Power electronics | Power harmonic filters | Power system stability | Pulse width modulation | Relays | Resonant frequency | Sections | Semiconductor diodes | Switches | Switching frequency | Switching loss | Topology | Uninterruptible power systems | Vectors | Voltage control | Voltage measurement | Wind turbinesGenre/Form: Electronic books.Additional physical formats: Print version:: No titleOnline resources: Abstract with links to resource Also available in print.Includes bibliographical references.phiques et un index.
About the Authors xi -- Preface xiii -- Acknowledgments xv -- 1 Introduction 1 -- 1.1 Modes of Operation of Microgrid Converters 2 -- 1.1.1 Grid Connection Mode 2 -- 1.1.2 Stand-Alone Mode 3 -- 1.1.3 Battery Charging Mode 3 -- 1.2 Converter Topologies 4 -- 1.3 Modulation Strategies 6 -- 1.4 Control and System Issues 7 -- 1.5 Future Challenges and Solutions 9 -- References 10 -- 2 Converter Topologies 13 -- 2.1 Topologies 13 -- 2.1.1 The Two-Level Converter 13 -- 2.1.2 The NPC Converter 14 -- 2.1.3 The CHB Converter 15 -- 2.2 Pulse Width Modulation Strategies 16 -- 2.2.1 Carrier-Based Strategies 17 -- 2.2.2 SVM Strategies 22 -- 2.3 Modeling 27 -- References 28 -- 3 DC-Link Capacitor Current and Sizing in NPC and CHB Inverters 29 -- 3.1 Introduction 29 -- 3.2 Inverter DC-Link Capacitor Sizing 30 -- 3.3 Analytical Derivation of DC-Link Capacitor Current RMS Expressions 32 -- 3.3.1 NPC Inverter 33 -- 3.3.2 CHB Inverter 36 -- 3.4 Analytical Derivation of DC-Link Capacitor Current Harmonics 37 -- 3.4.1 NPC Inverter 38 -- 3.4.2 CHB Inverter 39 -- 3.5 Numerical Derivation of DC-Link Capacitor Current RMS Value and Voltage Ripple Amplitude 41 -- 3.6 Simulation Results 42 -- 3.7 Discussion 45 -- 3.7.1 Comparison of Capacitor Size for the NPC and CHB Inverters 45 -- 3.7.2 Comparison of Presented Methods for Analyzing DC-Link Capacitor Current 46 -- 3.7.3 Extension to Higher-Level Inverters 48 -- 3.8 Conclusion 48 -- References 48 -- 4 Loss Comparison of Two- and Three-Level Inverter Topologies 51 -- 4.1 Introduction 51 -- 4.2 Selection of IGBT-Diode Modules 53 -- 4.3 Switching Losses 54 -- 4.3.1 Switching Losses in the Two-Level Inverters 54 -- 4.3.2 Switching Losses in the NPC Inverter 57 -- 4.3.3 Switching Losses in the CHB Inverter 58 -- 4.4 Conduction Losses 58 -- 4.4.1 Conduction Losses in the Two-Level Inverter 60 -- 4.4.2 Conduction Losses in the NPC Inverter 61 -- 4.4.3 Conduction Losses in the CHB Inverter 63 -- 4.5 DC-Link Capacitor RMS Current 65 -- 4.6 Results 69.
4.7 Conclusion 70 -- References 71 -- 5 Minimization of Low-Frequency Neutral-Point Voltage Oscillations in NPC Converters 73 -- 5.1 Introduction 73 -- 5.2 NPC Converter Modulation Strategies 74 -- 5.3 Minimum NP Ripple Achievable by NV Strategies 77 -- 5.3.1 Locally Averaged NP Current 78 -- 5.3.2 Effect of Switching Constraints 79 -- 5.3.3 Zero-Ripple Region 81 -- 5.3.4 A Lower Boundary for the NP Voltage Ripple 81 -- 5.4 Proposed Band-NV Strategies 83 -- 5.4.1 Criterion Used by Conventional NV Strategies 83 -- 5.4.2 Proposed Criterion 84 -- 5.4.3 Regions of Operation 85 -- 5.4.4 Algorithm 88 -- 5.4.5 Switching Sequences - Conversion to Band-NV 90 -- 5.5 Performance of Band-NV Strategies 91 -- 5.5.1 NP Voltage Ripple 91 -- 5.5.2 Effective Switching Frequency - Output Voltage Harmonic Distortion 93 -- 5.6 Simulation of Band-NV Strategies 94 -- 5.7 Hybrid Modulation Strategies 100 -- 5.7.1 Proposed Hybrid Strategies 101 -- 5.7.2 Simulation Results 102 -- 5.8 Conclusions 106 -- References 107 -- 6 Digital Control of a Three-Phase Two-Level Grid-Connected Inverter 109 -- 6.1 Introduction 109 -- 6.2 Control Strategy 112 -- 6.3 Digital Sampling Strategy 113 -- 6.4 Effect of Time Delay on Stability 115 -- 6.5 Capacitor Current Observer 116 -- 6.6 Design of Feedback Controllers 119 -- 6.7 Simulation Results 121 -- 6.8 Experimental Results 123 -- 6.9 Conclusions 127 -- References 128 -- 7 Design and Control of a Grid-Connected Interleaved Inverter 131 -- 7.1 Introduction 131 -- 7.2 Ripple Cancellation 135 -- 7.3 Hardware Design 137 -- 7.3.1 Hardware Design Guidelines 138 -- 7.3.2 Application of the Design Guidelines 145 -- 7.4 Controller Structure 146 -- 7.5 System Analysis 149 -- 7.5.1 Effect of Passive Damping and Grid Impedance 151 -- 7.5.2 Effect of Computational Time Delay 151 -- 7.5.3 Grid Disturbance Rejection 154 -- 7.6 Controller Design 154 -- 7.7 Simulation and Practical Results 158 -- 7.8 Conclusions 167 -- References 167 -- 8 Repetitive Current Control of an Interleaved Grid-Connected Inverter 171.
8.1 Introduction 171 -- 8.2 Proposed Controller and System Modeling 172 -- 8.3 System Analysis and Controller Design 175 -- 8.4 Simulation Results 178 -- 8.5 Experimental Results 179 -- 8.6 Conclusions 182 -- References 182 -- 9 Line Interactive UPS 185 -- 9.1 Introduction 185 -- 9.2 System Overview 188 -- 9.3 Core Controller 192 -- 9.3.1 Virtual Impedance and Grid Harmonics Rejection 193 -- 9.4 Power Flow Controller 195 -- 9.4.1 Drooping Control Equations 195 -- 9.4.2 Small Signal Analysis 196 -- 9.4.3 Stability Analysis and Drooping Coefficients Selection 200 -- 9.5 DC Link Voltage Controller 206 -- 9.6 Experimental Results 209 -- 9.7 Conclusions 217 -- References 218 -- 10 Microgrid Protection 221 -- 10.1 Introduction 221 -- 10.2 Key Protection Challenges 221 -- 10.2.1 Fault Current Level Modification 221 -- 10.2.2 Device Discrimination 223 -- 10.2.3 Reduction in Reach of Impedance Relays 223 -- 10.2.4 Bidirectionality and Voltage Profile Change 224 -- 10.2.5 Sympathetic Tripping 224 -- 10.2.6 Islanding 224 -- 10.2.7 Effect on Feeder Reclosure 224 -- 10.3 Possible Solutions to Key Protection Challenges 225 -- 10.3.1 Possible Solutions to Key Protection Challenges for an Islanded Microgrid Having IIDG Units 225 -- 10.4 Case Study 229 -- 10.4.1 Fault Level Modification 231 -- 10.4.2 Blinding of Protection 232 -- 10.4.3 Sympathetic Tripping 233 -- 10.4.4 Reduction in Reach of Distance Relay 233 -- 10.4.5 Discussion 234 -- 10.5 Conclusions 235 -- References 236 -- 11 An Adaptive Relaying Scheme for Fuse Saving 239 -- 11.1 Introduction 239 -- 11.1.1 Preventive Solutions Proposed in the Literature 240 -- 11.1.2 Remedial Solutions Proposed in the Literature 241 -- 11.1.3 Contributions of the Chapter 242 -- 11.2 Case Study 242 -- 11.3 Simulation Results and Discussion 245 -- 11.4 Fuse Saving Strategy 247 -- 11.4.1 Options and Considerations for the Selection of Ipickup of the 50 Element 249 -- 11.4.2 Adaptive Algorithm 251 -- 11.5 How Reclosing Will Be Applied 252 -- 11.6 Observations 255.
11.7 Conclusions 257 -- References 257 -- Appendix A SVM for the NPC Converter-MATLABª-Simulink Models 261 -- A.1 Calculation of Duty Cycles for Nearest Space Vectors 261 -- A.2 Symmetric Modulation Strategy 262 -- A.3 MATLABª-Simulink Models 263 -- References 279 -- Appendix B DC-Link Capacitor Current Numerical Calculation 281 -- Index 285.
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