part PART I: NANOFABRICATION TECHNIQUES FOR EMERGING MATERIALS AND DEVICES -- chapter 1 Deterministic Single-Ion Implantation Method for Quantum Processing in Silicon and Diamond / Takahiro Shinada -- chapter 2 Graphene and Two-Dimensional Materials: Extending Silicon Technology for the Future? / Andreas Bablich -- chapter 3 Nanofabrication Using Scanning Probe Microscopes / Vincent Bouchiat -- part PART II: THE SECOND LIFE AND NEW OPPORTUNITIES FOR SILICON CMOS -- chapter 4 High-? Dielectric Scaling for Nano-CMOS Technology / Hei Wong -- chapter 5 Nanometer-Scale Epitaxial Growth of Group IV Semiconductors / Junichi Murota -- chapter 6 TCAD-Based Design Technology Co-optimization for Variability in Nanoscale SOI FinFETs / Xingsheng Wang -- chapter 7 Nanowires for CMOS and Diversifications / Thomas Ernst.

"Since its invention, the integrated circuit has necessitated new process modules and numerous architectural changes to improve application performances, power consumption, and cost reduction. Silicon CMOS is now well established to offer the integration of several tens of billions of devices on a chip or in a system. At present, there are important challenges in the introduction of heterogeneous co-integration of materials and devices with the silicon CMOS 2D- and 3D-based platforms. New fabrication techniques allowing strong energy and variability efficiency come in as possible players to improve the various figures of merit of fabrication technology. Integrated Nanodevice and Nanosystem Fabrication: Breakthroughs and Alternatives is the second volume in the Pan Stanford Series on Intelligent Nanosystems. The book contains 8 chapters and is divided into two parts, the first of which reports breakthrough materials and techniques such as single ion implantation in silicon and diamond, graphene and 2D materials, nanofabrication using scanning probe microscopes, while the second tackles the scaling and architectural aspects of silicon devices through HiK scaling for nanoCMOS, nanoscale epitaxial growth of group IV semiconductors, design for variability co-optimization in SOI FinFETs, and nanowires for CMOS and diversifications."--Provided by publisher.