EDA for IC system design, verification, and testing / edited by Louis Scheffer, Luciano Lavagno, Grant Martin.
Contributor(s): Lavagno, Luciano | Martin, Grant (Grant Edmund) | Scheffer, Louis Kossuth.
Material type: BookSeries: Electronic design automation for integrated circuits handbook.Publisher: Boca Raton, FL : CRC Taylor & Francis, 2006Description: 1 online resource (544 pages).ISBN: 9781420007947; 9781315221700; 9781351828901.Other title: Electronic design automation for integrated circuit system design, verification, and testing.Uniform titles: EDA for IC implementation, circuit design, and process technology. Subject(s): Integrated circuits -- Computer-aided design | Integrated circuits -- Verification -- Data processingAdditional physical formats: Print version: : No titleDDC classification: 621.3815 Online resources: Click here to view.Companion volume of: EDA for IC implementation, circuit design, and process technology.
chapter 1 Overview -- chapter 2 The Integrated Circuit Design Process and Electronic Design Automation -- chapter 3 Tools and Methodologies for System-Level Design -- chapter 4 System-Level Specification and Modeling Languages -- chapter 5 SoC Block-Based Design and IP Assembly -- chapter 6 Performance Evaluation Methods for Multiprocessor System-on-Chip Design -- chapter 7 System-Level Power Management -- chapter 8 Processor Modeling and Design Tools -- chapter 9 Embedded Software Modeling and Design -- chapter 10 Using Performance Metrics to Select Microprocessor Cores for IC Designs -- chapter 11 Parallelizing High-Level Synthesis: A Code Transformational Approach to High-Level Synthesis -- chapter 12 Cycle-Accurate System-Level Modeling and Performance Evaluation -- chapter 13 Micro-Architectural Power Estimation and Optimization -- chapter 14 Design Planning -- chapter 15 Design and Verification Languages -- chapter 16 Digital Simulation -- chapter 17 Using Transactional-Level Models in an SoC Design Flow -- chapter 18 Assertion-Based Verification -- chapter 19 Hardware Acceleration and Emulation -- chapter 20 Formal Property Verification -- chapter 21 Design-For-Test -- chapter 22 Automatic Test Pattern Generation -- chapter 23 Analog and Mixed Signal Test.
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