000 | 03087nam a22005295i 4500 | ||
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001 | 978-3-319-08696-5 | ||
003 | DE-He213 | ||
005 | 20200420220219.0 | ||
007 | cr nn 008mamaa | ||
008 | 150102s2015 gw | s |||| 0|eng d | ||
020 |
_a9783319086965 _9978-3-319-08696-5 |
||
024 | 7 |
_a10.1007/978-3-319-08696-5 _2doi |
|
050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aBaruah, Sanjoy. _eauthor. |
|
245 | 1 | 0 |
_aMultiprocessor Scheduling for Real-Time Systems _h[electronic resource] / _cby Sanjoy Baruah, Marko Bertogna, Giorgio Buttazzo. |
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2015. |
|
300 |
_aXV, 228 p. 45 illus., 4 illus. in color. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aEmbedded Systems, _x2193-0155 |
|
505 | 0 | _aIntroduction: background, scope, and context -- Preliminaries: workload and platform models -- Preliminaries: scheduling concepts and goals -- A review of selected results on uniprocessors -- Implicit-deadline (L&L) tasks -- Partitioned scheduling of L&L tasks -- Global dynamic-priority scheduling of L&L tasks -- Global Fixed-Job-Priority scheduling of L&L tasks -- Global Fixed-Task-Priority scheduling of L&L tasks. | |
520 | _aThis book provides a comprehensive overview of both theoretical and pragmatic aspects of resource-allocation and scheduling in multiprocessor and multicore hard-real-time systems. The authors derive new, abstract models of real-time tasks that capture accurately the salient features of real application systems that are to be implemented on multiprocessor platforms, and identify rules for mapping application systems onto the most appropriate models. New run-time multiprocessor scheduling algorithms are presented, which are demonstrably better than those currently used, both in terms of run-time efficiency and tractability of off-line analysis. Readers will benefit from a new design and analysis framework for multiprocessor real-time systems, which will translate into a significantly enhanced ability to provide formally verified, safety-critical real-time systems at a significantly lower cost. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aMicroprocessors. | |
650 | 0 | _aElectronics. | |
650 | 0 | _aMicroelectronics. | |
650 | 0 | _aElectronic circuits. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aProcessor Architectures. |
650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
700 | 1 |
_aBertogna, Marko. _eauthor. |
|
700 | 1 |
_aButtazzo, Giorgio. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9783319086958 |
830 | 0 |
_aEmbedded Systems, _x2193-0155 |
|
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-319-08696-5 |
912 | _aZDB-2-ENG | ||
942 | _cEBK | ||
999 |
_c51793 _d51793 |