000 | 03807nam a22005535i 4500 | ||
---|---|---|---|
001 | 978-1-4939-1556-9 | ||
003 | DE-He213 | ||
005 | 20200420220222.0 | ||
007 | cr nn 008mamaa | ||
008 | 140910s2015 xxu| s |||| 0|eng d | ||
020 |
_a9781493915569 _9978-1-4939-1556-9 |
||
024 | 7 |
_a10.1007/978-1-4939-1556-9 _2doi |
|
050 | 4 | _aTK7800-8360 | |
050 | 4 | _aTK7874-7874.9 | |
072 | 7 |
_aTJF _2bicssc |
|
072 | 7 |
_aTEC008000 _2bisacsh |
|
072 | 7 |
_aTEC008070 _2bisacsh |
|
082 | 0 | 4 |
_a621.381 _223 |
100 | 1 |
_aQu, Shichun. _eauthor. |
|
245 | 1 | 0 |
_aWafer-Level Chip-Scale Packaging _h[electronic resource] : _bAnalog and Power Semiconductor Applications / _cby Shichun Qu, Yong Liu. |
264 | 1 |
_aNew York, NY : _bSpringer New York : _bImprint: Springer, _c2015. |
|
300 |
_aXVII, 322 p. 314 illus., 256 illus. in color. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
505 | 0 | _aChapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging -- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package -- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package -- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design -- Chapter 5. Wafer Level Discrete Power MOSFET Package Design -- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution -- Chapter 7. Thermal Management, Design, Analysis for WLCSP -- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP -- Chapter 9. WLCSP Typical Assembly Process -- Chapter 10. WLCSP Typical Reliability and Test. | |
520 | _aThis book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided. This book also: �         Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology �         Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology �         Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aThermodynamics. | |
650 | 0 | _aHeat engineering. | |
650 | 0 | _aHeat transfer. | |
650 | 0 | _aMass transfer. | |
650 | 0 | _aElectronics. | |
650 | 0 | _aMicroelectronics. | |
650 | 0 | _aElectronic circuits. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aEngineering Thermodynamics, Heat and Mass Transfer. |
700 | 1 |
_aLiu, Yong. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9781493915552 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4939-1556-9 |
912 | _aZDB-2-ENG | ||
942 | _cEBK | ||
999 |
_c51986 _d51986 |