000			03337nam a22004935i 4500
001			978-3-319-17924-7
003			DE-He213
005			20200420221248.0
007			cr nn 008mamaa
008			150519s2015 gw | s |||| 0|eng d
020			_a9783319179247 _9978-3-319-17924-7
024	7		_a10.1007/978-3-319-17924-7 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aSimpson, Philip Andrew. _eauthor.
245	1	0	_aFPGA Design _h[electronic resource] : _bBest Practices for Team-based Reuse / _cby Philip Andrew Simpson.
250			_a2nd ed. 2015.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2015.
300			_aXI, 257 p. 129 illus., 85 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aIntroduction -- Project Management -- Design Specification -- System Modeling -- Resource Scoping -- Design Environment -- Board Design -- Power and Thermal analysis -- Team Based Design -- RTL Design -- IP reuse -- Embedded Design -- Functional verification -- Timing Closure -- High level  Design -- In System Debug -- Design Sign-off.
520			_aThis book describes best practices for successful FPGA design. It is the result of the author's meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed. This book's content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams. Coverage includes the complete FPGA design flow, from the basics to advanced techniques.  This new edition has been enhanced to include new sections on System modeling, embedded design and high level design. The original sections on Design Environment, RTL design and timing closure have all been expanded to include more up to date techniques as well as providing more extensive scripts and RTL code that can be reused by readers. Presents complete, field-tested methodology for FPGA design, focused on reuse across design teams; Offers best practices for FPGA timing closure, in-system debug, and board design; Details techniques to resolve common pitfalls in designing with FPGAs.
650		0	_aEngineering.
650		0	_aMicroprocessors.
650		0	_aElectronics.
650		0	_aMicroelectronics.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aProcessor Architectures.
650	2	4	_aElectronics and Microelectronics, Instrumentation.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319179230
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-319-17924-7
912			_aZDB-2-ENG
942			_cEBK
999			_c52420 _d52420