000 | 03315nam a22005295i 4500 | ||
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001 | 978-3-319-14376-7 | ||
003 | DE-He213 | ||
005 | 20200421111655.0 | ||
007 | cr nn 008mamaa | ||
008 | 150113s2015 gw | s |||| 0|eng d | ||
020 |
_a9783319143767 _9978-3-319-14376-7 |
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024 | 7 |
_a10.1007/978-3-319-14376-7 _2doi |
|
050 | 4 | _aQ342 | |
072 | 7 |
_aUYQ _2bicssc |
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072 | 7 |
_aCOM004000 _2bisacsh |
|
082 | 0 | 4 |
_a006.3 _223 |
100 | 1 |
_aChakrabarti, Indrajit. _eauthor. |
|
245 | 1 | 0 |
_aMotion Estimation for Video Coding _h[electronic resource] : _bEfficient Algorithms and Architectures / _cby Indrajit Chakrabarti, Kota Naga Srinivasarao Batta, Sumit Kumar Chatterjee. |
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2015. |
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300 |
_aXVIII, 157 p. 67 illus. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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490 | 1 |
_aStudies in Computational Intelligence, _x1860-949X ; _v590 |
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505 | 0 | _aIntroduction -- Background and Literature Survey -- VLSI Architecture for Fast Three Step Search Algorithm -- Parallel Architecture for Successive Elimination Block Matching Algorithm -- Fast One-Bit Transformation Architectures -- Efficient Pixel Truncation Algorithm and Architecture -- Introduction to Scalable Image and Video Coding -- Forward Plans -- 8 Forward Plans -- A Matlab Programs -- B Verilog Modules. | |
520 | _aThe need of video compression in the modern age of visual communication cannot be over-emphasized. This monograph will provide useful information to the postgraduate students and researchers who wish to work in the domain of VLSI design for video processing applications. In this book, one can find an in-depth discussion of several motion estimation algorithms and their VLSI implementation as conceived and developed by the authors. It records an account of research done involving fast three step search, successive elimination, one-bit transformation and its effective combination with diamond search and dynamic pixel truncation techniques. Two appendices provide a number of instances of proof of concept through Matlab and Verilog program segments. In this aspect, the book can be considered as first of its kind. The architectures have been developed with an eye to their applicability in everyday low-power handheld appliances including video camcorders and smartphones. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aArtificial intelligence. | |
650 | 0 | _aImage processing. | |
650 | 0 | _aComputational intelligence. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aComputational Intelligence. |
650 | 2 | 4 | _aImage Processing and Computer Vision. |
650 | 2 | 4 | _aArtificial Intelligence (incl. Robotics). |
650 | 2 | 4 | _aSignal, Image and Speech Processing. |
700 | 1 |
_aBatta, Kota Naga Srinivasarao. _eauthor. |
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700 | 1 |
_aChatterjee, Sumit Kumar. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9783319143750 |
830 | 0 |
_aStudies in Computational Intelligence, _x1860-949X ; _v590 |
|
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-319-14376-7 |
912 | _aZDB-2-ENG | ||
942 | _cEBK | ||
999 |
_c54618 _d54618 |