000 03851nam a22005055i 4500
001 978-3-319-10563-5
003 DE-He213
005 20200421111844.0
007 cr nn 008mamaa
008 140922s2015 gw | s |||| 0|eng d
020 _a9783319105635
_9978-3-319-10563-5
024 7 _a10.1007/978-3-319-10563-5
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aGimeno Gasca, Cecilia.
_eauthor.
245 1 0 _aCMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links
_h[electronic resource] /
_cby Cecilia Gimeno Gasca, Santiago Celma Pueyo, Concepci�on Aldea Chagoyen.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2015.
300 _aXXII, 148 p. 136 illus., 85 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aAnalog Circuits and Signal Processing,
_x1872-082X
505 0 _aIntroduction -- Theoretical Study of Continuous-Time Equalizers -- Continuous-Time Linear Equalizers -- Adaptation Loop -- Receiver Front-End For 1.25 GB/s SI-POF -- Conclusions.       .
520 _aThis book introduces readers to the design of adaptive equalization solutions integrated in standard CMOS technology for high-speed serial links. Since continuous-time equalizers offer various advantages as an alternative to discrete-time equalizers at multi-gigabit rates, this book provides a detailed description of continuous-time adaptive equalizers design - both at transistor and system levels-, their main characteristics and performances. The authors begin with a complete review and analysis of the state of the art of equalizers for wireline applications, describing why they are necessary, their types, and their main applications. Next, theoretical fundamentals of continuous-time adaptive equalizers are explored. Then, new structures are proposed to implement the different building blocks of the adaptive equalizer: line equalizer, loop-filters, power comparator, etc.  The authors demonstrate the design of a complete low-power, low-voltage, high-speed, continuous-time adaptive equalizer. Finally, a cost-effective CMOS receiver which includes the proposed continuous-time adaptive equalizer is designed for 1.25 Gb/s optical communications through 50-m length, 1-mm diameter plastic optical fiber (POF).     �  Covers complete design flow of continuous-time adaptive equalizers, from analysis of theoretical fundamentals to the final architecture; �  Includes analysis, design, and implementation of the main adaptive equalizer blocks, revealing key challenges and solutions in the design of such high performance cells; �  Discusses the most important points in the design of an adaptive equalizer, considering restrictions of the optical link and the limitations in submicron CMOS implementations.         .
650 0 _aEngineering.
650 0 _aElectronics.
650 0 _aMicroelectronics.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aElectronics and Microelectronics, Instrumentation.
700 1 _aCelma Pueyo, Santiago.
_eauthor.
700 1 _aAldea Chagoyen, Concepci�on.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783319105628
830 0 _aAnalog Circuits and Signal Processing,
_x1872-082X
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-319-10563-5
912 _aZDB-2-ENG
942 _cEBK
999 _c55728
_d55728