000 03093nam a22004575i 4500
001 978-1-4614-1749-1
003 DE-He213
005 20200421112037.0
007 cr nn 008mamaa
008 120928s2013 xxu| s |||| 0|eng d
020 _a9781461417491
_9978-1-4614-1749-1
024 7 _a10.1007/978-1-4614-1749-1
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aAbu-Rahma, Mohamed H.
_eauthor.
245 1 0 _aNanometer Variation-Tolerant SRAM
_h[electronic resource] :
_bCircuits and Statistical Design for Yield /
_cby Mohamed H. Abu-Rahma, Mohab Anis.
264 1 _aNew York, NY :
_bSpringer New York :
_bImprint: Springer,
_c2013.
300 _aXVI, 172 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aIntroduction -- Variability in Nanometer Technologies and Impact on SRAM -- Variarion-Tolerant SRAM Write and Read Assist Techniques -- Reducing SRAM Power using Fine-Grained Wordline Pulse Width Control -- A Methodology for Statistical Estimation of Read Access Yield in SRAMs -- Characterization of SRAM Sense Amplifier Input Offset for Yield Prediction.
520 _aVariability is one of the most challenging obstacles for IC design in the nanometer regime.  In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption and cost, while achieving higher performance and density.  With the drastic increase in memory densities, lower supply voltages, and higher variations, statistical simulation methodologies become imperative to estimate memory yield and optimize performance and power. This book is an invaluable reference on robust SRAM circuits and statistical design methodologies for researchers and practicing engineers in the field of memory design. It combines state of the art circuit techniques and statistical methodologies to optimize SRAM performance and yield in nanometer technologies.   Provides comprehensive review of state-of-the-art, variation-tolerant SRAM circuit techniques; Discusses Impact of device related process variations and how they affect circuit and system performance, from a design point of view; Helps designers optimize memory yield, with practical statistical design methodologies and yield estimation techniques.
650 0 _aEngineering.
650 0 _aComputer-aided engineering.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
700 1 _aAnis, Mohab.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781461417484
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4614-1749-1
912 _aZDB-2-ENG
942 _cEBK
999 _c56441
_d56441