000 04407nam a22005895i 4500
001 978-3-319-21668-3
003 DE-He213
005 20200421112222.0
007 cr nn 008mamaa
008 150713s2015 gw | s |||| 0|eng d
020 _a9783319216683
_9978-3-319-21668-3
024 7 _a10.1007/978-3-319-21668-3
_2doi
050 4 _aQA76.9.L63
050 4 _aQA76.5913
050 4 _aQA76.63
072 7 _aUM
_2bicssc
072 7 _aUYF
_2bicssc
072 7 _aCOM051000
_2bisacsh
072 7 _aCOM036000
_2bisacsh
082 0 4 _a005.1015113
_223
245 1 0 _aComputer Aided Verification
_h[electronic resource] :
_b27th International Conference, CAV 2015, San Francisco, CA, USA, July 18-24, 2015, Proceedings, Part II /
_cedited by Daniel Kroening, Corina S. Păsăreanu.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2015.
300 _aXVIII, 469 p. 107 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Computer Science,
_x0302-9743 ;
_v9207
505 0 _aSMT Techniques and Applications -- POLING: SMT Aided Linearizability Proofs -- Finding Bounded Path in Graph Using SMT for Automatic Clock Routing -- Cutting the Mix -- The Inez Mathematical Programming Modulo Theories Framework -- Using Minimal Correction Sets to More Efficiently Compute Minimal Unsatisfiable Sets -- Deciding Local Theory Extensions via E-matching -- HW Verification -- Modular Deductive Verification of Multiprocessor Hardware Designs -- Word-Level Symbolic Trajectory Evaluation -- Verifying Linearizability of Intel� Software Guard Extensions -- Synthesis Synthesis Through Unification -- From Non-preemptive to Preemptive Scheduling Using Synchronization Synthesis -- Counterexample-Guided Quantifier Instantiation for Synthesis in SMT -- Deductive Program Repair -- Quantifying Conformance Using the Skorokhod Metric -- Pareto Curves of Multidimensional Mean-Payoff Games -- Termination -- Conflict-Driven Conditional Termination -- Predicate Abstraction and CEGAR for Disproving Termination of Higher-Order Functional Programs -- Complexity of Bradley-Manna-Sipma Lexicographic Ranking Functions -- Measuring with Timed Patterns -- Automatic Verification of Stability and Safety for Delay Differential Equations -- Time Robustness in MTL and Expressivity in Hybrid System Falsification -- Concurrency -- Adaptive Concretization for Parallel Program Synthesis -- Automatic Completion of Distributed Protocols with Symmetry -- An Axiomatic Specification for Sequential Memory Models -- Approximate Synchrony: An Abstraction for Distributed Almost-Synchronous Systems -- Automated and Modular Refinement Reasoning for Concurrent Programs.
520 _aThe two-volume set LNCS 9206 and LNCS 9207 constitutes the refereed proceedings of the 27th International Conference on Computer Aided Verification, CAV 2015, held in San Francisco, CA, USA, in July 2015. The total of 58 full and 11 short papers presented in the proceedings was carefully reviewed and selected from 252 submissions. The papers were organized in topical sections named: model checking and refinements; quantitative reasoning; software analysis; lightning talks; interpolation, IC3/PDR, and Invariants; SMT techniques and applications; HW verification; synthesis; termination; and concurrency.
650 0 _aComputer science.
650 0 _aComputer organization.
650 0 _aSoftware engineering.
650 0 _aComputer logic.
650 0 _aMathematical logic.
650 1 4 _aComputer Science.
650 2 4 _aLogics and Meanings of Programs.
650 2 4 _aSoftware Engineering/Programming and Operating Systems.
650 2 4 _aMathematical Logic and Formal Languages.
650 2 4 _aComputer Systems Organization and Communication Networks.
700 1 _aKroening, Daniel.
_eeditor.
700 1 _aPăsăreanu, Corina S.
_eeditor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783319216676
830 0 _aLecture Notes in Computer Science,
_x0302-9743 ;
_v9207
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-319-21668-3
912 _aZDB-2-SCS
912 _aZDB-2-LNC
942 _cEBK
999 _c57477
_d57477