000 | 12752nam a2202329 i 4500 | ||
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001 | 5265766 | ||
003 | IEEE | ||
005 | 20200421114115.0 | ||
006 | m o d | ||
007 | cr |n||||||||| | ||
008 | 100317t20152002njua ob 000 0 eng d | ||
020 |
_a9780470544310 _qelectronic |
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020 |
_z9780471227823 _qprint |
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020 |
_z0470544317 _qelectronic |
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024 | 7 |
_a10.1109/9780470544310 _2doi |
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035 | _a(CaBNVSL)mat05265766 | ||
035 | _a(IDAMS)0b000064810c58ea | ||
040 |
_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL |
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050 | 4 |
_aTK7874 _b.C647426 2002eb |
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082 | 0 | 4 |
_a621.38150285 _222 |
245 | 0 | 0 |
_aComputer-aided design of analog integrated circuits and systems / _cedited by Rob A. Rutenbar, Georges G.E. Gielen, Brian A. Antao. |
264 | 1 |
_aPiscataway, New Jersey : _bIEEE Press, _cc2002. |
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264 | 2 |
_a[Piscataqay, New Jersey] : _bIEEE Xplore, _c[2002] |
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300 |
_a1 PDF (xi, 754 pages) : _billustrations. |
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336 |
_atext _2rdacontent |
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337 |
_aelectronic _2isbdmedia |
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338 |
_aonline resource _2rdacarrier |
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500 | _a"A selected reprint volume." | ||
504 | _aIncludes bibliographical references. | ||
505 | 0 | _aPreface -- Acknowledgments -- Computer-Aided Design of Analog and Mixed-Signal Integrated Circuits -- Design of Mixed-Signal Systems-on-a-Chip -- IDAC: An Interactive Design Tool for Analog CMOS Circuits -- OPASYN: A Compliler for CMOS Operational Amplifiers -- OASYS: A Framework for Analog Circuit Synthesis -- Analog Circuit Design Optimization Based on Symbolic Simulation and Simulated Annealing -- STAIC: An Interactive Framework for Synthesizing CMOS and BiCMOS Analog Circuits -- Integer Programming Based Topology Selection of Cell-Level Analog Circuits -- ARCHGEN: Automated Synthesis of Analog Systems -- DARWIN: CMOS Opamp Synthesis by Means of a Genetic Algorithm -- AMGIE: A Synthesis Environment for CMOS Analog Integrated Circuits -- A High-Level Design and Optimization Tool for Analog RF Receiver Front-Ends -- A Statistical Optimization-Based Approach for Automated Sizing of Analog Cells -- Synthesis of High-Performance Analog Circuits in ASTRX/OBLX -- MAELSTROM: Efficient Simulation-Based Synthesis for Custom Analog Cells -- Anaconda: Simulation-Based Synthesis of Analog Circuits Via Stochastic Pattern Search -- A Case Study of Synthesis for Industrial-Scale Analog IP: Redesign of the Equalizer/Filter Frontend for an ADSL CODEC -- WiCkeD: Analog Circuit Synthesis Incorporating Mismatch -- Optimal Design of a CMOS Op-Amp via Geometric Programming -- Techniques and Applications of Symbolic Analysis for Analog Integrated Circuits: A Tutorial Overview -- Flowgraph Analysis of Large Electronic Networks -- ISAAC: A Symbolic Simulator for Analog Integrated Circuits -- Interactive AC Modeling and Characterization of Analog Circuits via Symbolic Analysis -- SSCNAP: A Program for Symbolic Analysis of Switched Capacitor Circuits -- Efficient Symbolic Computation of Approximated Small-Signal Characteristics of Analog Integrated Circuits -- Efficient Approximation of Symbolic Network Functions Using Matroid Intersection Algorithms -- High-Frequency Distortion Analysis of Analog Integrated Circuits. | |
505 | 8 | _aCanonical Symbolic Analysis of Large Analog Circuits with Determinant Decision Diagrams -- Layout Tools for Analog ICs and Mixed-Signal SoCs: A Survey -- ILAC: An Automated Layout Tool for Analog CMOS Circuits -- KOAN/ANAGRAM II: New Tools for Device-Level Analog Placement and Routing -- Automatic Generation of Parasitic Constraints for Performance-Constrained Physical Design of Analog Circuits -- Performance-Driven Compaction for Analog Integrated Circuits -- Automation of IC Layout with Analog Constraints -- A Performance-Driven Placement Tool for Analog Integrated Circuits -- Optimum CMOS Stack Generation with Analog Constraints -- Substrate-Aware Mixed-Signal Macrocell Placement in WRIGHT -- System-Level Routing of Mixed-Signal ASICs in WREN -- Addressing Substrate Coupling in Mixed-Mode IC's: Simulation and Power Distribution Synthesis -- Mondriaan: A Tool for Automated Layout Synthesis of Array-Type Analog Blocks -- Device-Level Early Floorplanning Algorithms for RF Circuits -- Macromodeling of Integrated Circuit Operational Amplifiers -- A Macromodeling Algorithm for Analog Circuits -- Consistency Checking and Optimization of Macromodels -- Computer-Aided Design Considerations for Mixed-Signal Coupling in RF Integrated Circuits -- Integration and Electrical Isolation in CMOS Mixed-Signal Wireless Chips -- Simulating and Testing Oversampled Analog-to-Digital Converters -- Simulation of Mixed Switched-Capacitor/Digital Networks with Signal-Driven Switches -- Behavioral Simulation for Analog System Design Verification -- Multilevel and Mixed-Domain Simulation of Analog Circuits and Systems -- Simulation Methods for RF Integrated Circuits -- VHDL-AMS - A Hardware Description Language for Analog and Mixed-Signal Applications -- DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits -- Design Centering by Yield Prediction -- Statistical Integrated Circuit Design -- Yield Optimization of Analog IC's Using Two-Step Analytic Modeling Methods. | |
505 | 8 | _aCircuit Analysis and Optimization Driven by Worst-Case Distances -- Efficient Analog Circuit Synthesis with Simultaneous Yield and Robustness Optimization -- Efficient Handling of Operating Range and Manufacturing Line Variations in Analog Cell Synthesis -- The Generalized Boundary Curve - A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits -- Metrics, Techniques and Recent Developments in Mixed-Signal Testing -- A Tutorial Introduction to Research on Analog and Mixed-Signal Circuit Testing -- About the Editors. | |
506 | 1 | _aRestricted to subscribers or individual electronic text purchasers. | |
520 | _aThe tools and techniques you need to break the analog design bottleneck! Ten years ago, analog seemed to be a dead-end technology. Today, System-on-Chip (SoC) designs are increasingly mixed-signal designs. With the advent of application-specific integrated circuits (ASIC) technologies that can integrate both analog and digital functions on a single chip, analog has become more crucial than ever to the design process. Today, designers are moving beyond hand-crafted, one-transistor-at-a-time methods. They are using new circuit and physical synthesis tools to design practical analog circuits; new modeling and analysis tools to allow rapid exploration of system level alternatives; and new simulation tools to provide accurate answers for analog circuit behaviors and interactions that were considered impossible to handle only a few years ago. To give circuit designers and CAD professionals a better understanding of the history and the current state of the art in the field, this volume collects in one place the essential set of analog CAD papers that form the foundation of today's new analog design automation tools. Areas covered are: . Analog synthesis. Symbolic analysis. Analog layout. Analog modeling and analysis. Specialized analog simulation. Circuit centering and yield optimization. Circuit testing Computer-Aided Design of Analog Integrated Circuits and Systems is the cutting-edge reference that will be an invaluable resource for every semiconductor circuit designer and CAD professional who hopes to break the analog design bottleneck. | ||
530 | _aAlso available in print. | ||
538 | _aMode of access: World Wide Web | ||
588 | _aDescription based on PDF viewed 12/21/2015. | ||
650 | 0 |
_aIntegrated circuits _xComputer-aided design. |
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655 | 0 | _aElectronic books. | |
695 | _aAccuracy | ||
695 | _aAdmittance | ||
695 | _aAlgorithm design and analysis | ||
695 | _aAnalog circuits | ||
695 | _aAnalog integrated circuits | ||
695 | _aAnalog-digital conversion | ||
695 | _aAnalytical models | ||
695 | _aAnnealing | ||
695 | _aAnodes | ||
695 | _aApplication specific integrated circuits | ||
695 | _aApproximation algorithms | ||
695 | _aApproximation methods | ||
695 | _aArrays | ||
695 | _aArtificial intelligence | ||
695 | _aAssembly | ||
695 | _aAtmospheric modeling | ||
695 | _aBiographies | ||
695 | _aBismuth | ||
695 | _aBuilt-in self-test | ||
695 | _aCMOS integrated circuits | ||
695 | _aCapacitance | ||
695 | _aCapacitors | ||
695 | _aCathodes | ||
695 | _aCentral Processing Unit | ||
695 | _aCircuit analysis | ||
695 | _aCircuit faults | ||
695 | _aCircuit simulation | ||
695 | _aCircuit synthesis | ||
695 | _aClocks | ||
695 | _aCompaction | ||
695 | _aComputational modeling | ||
695 | _aComputer architecture | ||
695 | _aComputers | ||
695 | _aConverters | ||
695 | _aConvex functions | ||
695 | _aConvolution | ||
695 | _aCooling | ||
695 | _aCost function | ||
695 | _aCouplings | ||
695 | _aDatabases | ||
695 | _aDecoding | ||
695 | _aDegradation | ||
695 | _aDelta modulation | ||
695 | _aDesign automation | ||
695 | _aDigital circuits | ||
695 | _aDistortion | ||
695 | _aDistortion measurement | ||
695 | _aEigenvalues and eigenfunctions | ||
695 | _aEngines | ||
695 | _aEqualizers | ||
695 | _aEquations | ||
695 | _aFinite element methods | ||
695 | _aFinite impulse response filter | ||
695 | _aFluctuations | ||
695 | _aFrequency conversion | ||
695 | _aFrequency domain analysis | ||
695 | _aFrequency estimation | ||
695 | _aFrequency modulation | ||
695 | _aGain | ||
695 | _aGenerators | ||
695 | _aGeometry | ||
695 | _aGraphics | ||
695 | _aHardware | ||
695 | _aHardware design languages | ||
695 | _aHarmonic analysis | ||
695 | _aHarmonic distortion | ||
695 | _aHeuristic algorithms | ||
695 | _aImpedance | ||
695 | _aIntegrated circuit interconnections | ||
695 | _aIntegrated circuit modeling | ||
695 | _aIntegrated circuits | ||
695 | _aInterpolation | ||
695 | _aInverters | ||
695 | _aLayout | ||
695 | _aLibraries | ||
695 | _aLoad modeling | ||
695 | _aLogic gates | ||
695 | _aMOS devices | ||
695 | _aMacrocell networks | ||
695 | _aManufacturing | ||
695 | _aMathematical model | ||
695 | _aMatrices | ||
695 | _aMatrix decomposition | ||
695 | _aMerging | ||
695 | _aMicrocomputers | ||
695 | _aMicrowave filters | ||
695 | _aMirrors | ||
695 | _aMonte Carlo methods | ||
695 | _aNiobium | ||
695 | _aNoise | ||
695 | _aNumerical models | ||
695 | _aNumerical simulation | ||
695 | _aObject oriented modeling | ||
695 | _aOperational amplifiers | ||
695 | _aOptimization | ||
695 | _aOptimization methods | ||
695 | _aOrganizations | ||
695 | _aPartitioning algorithms | ||
695 | _aPeer to peer computing | ||
695 | _aPerformance evaluation | ||
695 | _aPins | ||
695 | _aPluto | ||
695 | _aPoles and zeros | ||
695 | _aPolynomials | ||
695 | _aPositron emission tomography | ||
695 | _aProduction | ||
695 | _aProgramming | ||
695 | _aRLC circuits | ||
695 | _aRadio frequency | ||
695 | _aReceivers | ||
695 | _aResistors | ||
695 | _aResource management | ||
695 | _aRobustness | ||
695 | _aRouting | ||
695 | _aSPICE | ||
695 | _aSchedules | ||
695 | _aSemantics | ||
695 | _aSemiconductor process modeling | ||
695 | _aSensitivity | ||
695 | _aShape | ||
695 | _aSignal to noise ratio | ||
695 | _aSolid modeling | ||
695 | _aSpace exploration | ||
695 | _aSparse matrices | ||
695 | _aStochastic processes | ||
695 | _aSubstrates | ||
695 | _aSwitches | ||
695 | _aSwitching circuits | ||
695 | _aSystem-on-a-chip | ||
695 | _aTesting | ||
695 | _aTime domain analysis | ||
695 | _aTime frequency analysis | ||
695 | _aTiming | ||
695 | _aTopology | ||
695 | _aTrademarks | ||
695 | _aTransceivers | ||
695 | _aTransconductance | ||
695 | _aTransfer functions | ||
695 | _aTransient analysis | ||
695 | _aTransistors | ||
695 | _aTurbo codes | ||
695 | _aUncertainty | ||
695 | _aVectors | ||
695 | _aViterbi algorithm | ||
695 | _aWire | ||
695 | _aWireless communication | ||
695 | _aWires | ||
695 | _aWiring | ||
695 | _aYield estimation | ||
700 | 1 | _aGielen, Georges. | |
700 | 1 |
_aRutenbar, Rob A., _d1957- |
|
700 | 1 | _aAntao, Brian. | |
710 | 2 |
_aJohn Wiley & Sons, _epublisher. |
|
710 | 2 |
_aIEEE Xplore (Online service), _edistributor. |
|
776 | 0 | 8 |
_iPrint version: _z9780471227823 |
856 | 4 | 2 |
_3Abstract with links to resource _uhttp://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5265766 |
942 | _cEBK | ||
999 |
_c59513 _d59513 |