| 000 | 08427nam a2201213 i 4500 | ||
|---|---|---|---|
| 001 | 6016259 | ||
| 003 | IEEE | ||
| 005 | 20200421114236.0 | ||
| 006 | m o d | ||
| 007 | cr |n||||||||| | ||
| 008 | 151221s2011 njua ob 001 eng d | ||
| 020 |
_a9780470828519 _qebook |
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| 020 |
_z9780470828496 _qprint |
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| 020 |
_z047082851X _qelectronic |
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| 024 | 7 |
_a10.1002/9780470828519 _2doi |
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| 035 | _a(CaBNVSL)mat06016259 | ||
| 035 | _a(IDAMS)0b0000648164c992 | ||
| 040 |
_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL |
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| 050 | 4 |
_aTK7895.E42 _bB3264 2011eb |
|
| 082 | 0 | 4 |
_a621.39/9 _222 |
| 100 | 1 |
_aBailey, Donald G. _q(Donald Graeme), _d1962- |
|
| 245 | 1 | 0 |
_aDesign for embedded image processing on FPGAs / _cDonald G. Bailey. |
| 264 | 1 |
_aNew York, NY : _bWiley, _c2011. |
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| 264 | 2 |
_a[Piscataqay, New Jersey] : _bIEEE Xplore, _c[2011] |
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| 300 |
_a1 PDF (xvi, 482 pages) : _billustrations (some color). |
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| 336 |
_atext _2rdacontent |
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| 337 |
_aelectronic _2isbdmedia |
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| 338 |
_aonline resource _2rdacarrier |
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| 504 | _aIncludes bibliographical references. | ||
| 505 | 0 | _aPreface -- Acknowledgements -- 1 Image Processing -- 1.1 Basic Definitions -- 1.2 Image Formation -- 1.3 Image Processing Operations -- 1.4 Example Application -- 1.5 Real-Time Image Processing -- 1.6 Embedded Image Processing -- 1.7 Serial Processing -- 1.8 Parallelism -- 1.9 Hardware Image Processing Systems -- 2 Field Programmable Gate Arrays -- 2.1 Programmable Logic -- 2.2 FPGAs and Image Processing -- 2.3 Inside an FPGA -- 2.4 FPGA Families and Features -- 2.5 Choosing an FPGA or Development Board -- 3 Languages -- 3.1 Hardware Description Languages -- 3.2 Software-Based Languages -- 3.3 Visual Languages -- 3.4 Summary -- 4 Design Process -- 4.1 Problem Specification -- 4.2 Algorithm Development -- 4.3 Architecture Selection -- 4.4 System Implementation -- 4.5 Designing for Tuning and Debugging -- 5 Mapping Techniques -- 5.1 Timing Constraints -- 5.2 Memory Bandwidth Constraints -- 5.3 Resource Constraints -- 5.4 Computational Techniques -- 5.5 Summary -- 6 Point Operations -- 6.1 Point Operations on a Single Image -- 6.2 Point Operations on Multiple Images -- 6.3 Colour Image Processing -- 6.4 Summary -- 7 Histogram Operations -- 7.1 Greyscale Histogram -- 7.2 Multidimensional Histograms -- 8 Local Filters -- 8.1 Caching -- 8.2 Linear Filters -- 8.3 Nonlinear Filters -- 8.4 Rank Filters -- 8.5 Colour Filters -- 8.6 Morphological Filters -- 8.7 Adaptive Thresholding -- 8.8 Summary -- 9 Geometric Transformations -- 9.1 Forward Mapping -- 9.2 Reverse Mapping -- 9.3 Interpolation -- 9.4 Mapping Optimisations -- 9.5 Image Registration -- 10 Linear Transforms -- 10.1 Fourier Transform -- 10.2 Discrete Cosine Transform -- 10.3 Wavelet Transform -- 10.4 Image and Video Coding -- 11 Blob Detection and Labelling -- 11.1 Bounding Box -- 11.2 Run-Length Coding -- 11.3 Chain Coding -- 11.4 Connected Component Labelling -- 11.5 Distance Transform -- 11.6 Watershed Transform -- 11.7 Hough Transform -- 11.8 Summary -- 12 Interfacing -- 12.1 Camera Input -- 12.2 Display Output. | |
| 505 | 8 | _a12.3 Serial Communication -- 12.4 Memory -- 12.5 Summary -- 13 Testing, Tuning and Debugging -- 13.1 Design -- 13.2 Implementation -- 13.3 Tuning -- 13.4 Timing Closure -- 14 Example Applications -- 14.1 Coloured Region Tracking -- 14.2 Lens Distortion Correction -- 14.3 Foveal Sensor -- 14.4 Range Imaging -- 14.5 Real-Time Produce Grading -- 14.6 Summary -- References -- Index. | |
| 506 | 1 | _aRestricted to subscribers or individual electronic text purchasers. | |
| 520 | _aDr Donald Bailey starts with introductory material considering the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The design process for implementing an image processing algorithm on an FPGA is compared with that for a conventional software implementation, with the key differences highlighted. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage is given of a range of low and intermediate level image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques are illustrated with several example applications or case studies from projects or applications the author has been involved with. Issues such as interfacing between the FPGA and peripheral devices are covered briefly, as is designing the system in such a way that it can be more readily debugged and tuned.. Provides a bridge between algorithms and hardware. Demonstrates how to avoid many of the potential pitfalls. Offers practical recommendations and solutions. Illustrates several real-world applications and case studies. Allows those with software backgrounds to understand efficient hardware implementationDesign for Embedded Image Processing on FPGAs is ideal for researchers and engineers in the vision or image processing industry, who are looking at smart sensors, machine vision, and robotic vision, as well as FPGA developers and application engineers.The book can also be used by graduate students studying imaging systems, computer engineering, digital design, circuit design, or computer science. It can also be used as supplementary text for courses in advanced digital design, algorithm and hardware implementation, and digital signal processing and applications.Lecture slides for instructors available at:www.wiley.com/go/bailey/fpga. | ||
| 530 | _aAlso available in print. | ||
| 538 | _aMode of access: World Wide Web | ||
| 588 | _aDescription based on PDF viewed 12/21/2015. | ||
| 650 | 0 | _aEmbedded computer systems. | |
| 650 | 0 | _aField programmable gate arrays. | |
| 655 | 0 | _aElectronic books. | |
| 695 | _aAlgorithm design and analysis | ||
| 695 | _aBandwidth | ||
| 695 | _aBibliographies | ||
| 695 | _aBrightness | ||
| 695 | _aCameras | ||
| 695 | _aClocks | ||
| 695 | _aCodecs | ||
| 695 | _aColor | ||
| 695 | _aComputer architecture | ||
| 695 | _aComputers | ||
| 695 | _aDigital images | ||
| 695 | _aEquations | ||
| 695 | _aFast Fourier transforms | ||
| 695 | _aField programmable gate arrays | ||
| 695 | _aFrequency domain analysis | ||
| 695 | _aGenerators | ||
| 695 | _aHardware | ||
| 695 | _aHeuristic algorithms | ||
| 695 | _aHistograms | ||
| 695 | _aIEEE 1394 Standard | ||
| 695 | _aImage coding | ||
| 695 | _aImage color analysis | ||
| 695 | _aImage edge detection | ||
| 695 | _aImage processing | ||
| 695 | _aImage segmentation | ||
| 695 | _aImage sensors | ||
| 695 | _aIndexes | ||
| 695 | _aIntegrated circuit interconnections | ||
| 695 | _aIntegrated circuit modeling | ||
| 695 | _aIron | ||
| 695 | _aLabeling | ||
| 695 | _aLenses | ||
| 695 | _aLighting | ||
| 695 | _aLogic gates | ||
| 695 | _aMathematical model | ||
| 695 | _aMemory management | ||
| 695 | _aMultiplexing | ||
| 695 | _aNanometers | ||
| 695 | _aNoise | ||
| 695 | _aPROM | ||
| 695 | _aPipeline processing | ||
| 695 | _aPipelines | ||
| 695 | _aPropagation delay | ||
| 695 | _aProtocols | ||
| 695 | _aRadiation detectors | ||
| 695 | _aRandom access memory | ||
| 695 | _aRegisters | ||
| 695 | _aSensors | ||
| 695 | _aShift registers | ||
| 695 | _aSoftware algorithms | ||
| 695 | _aStreaming media | ||
| 695 | _aSwitches | ||
| 695 | _aSynchronization | ||
| 695 | _aTable lookup | ||
| 695 | _aTesting | ||
| 695 | _aTransfer functions | ||
| 695 | _aTransforms | ||
| 695 | _aUniversal Serial Bus | ||
| 695 | _aWheels | ||
| 710 | 2 |
_aIEEE Xplore (Online Service), _edistributor. |
|
| 710 | 2 |
_aJohn Wiley & Sons, _epublisher. |
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| 776 | 0 | 8 |
_iPrint version: _z9780470828496 |
| 856 | 4 | 2 |
_3Abstract with links to resource _uhttp://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6016259 |
| 942 | _cEBK | ||
| 999 |
_c59787 _d59787 |
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