| 000 | 00593nam a22002177a 4500 | ||
|---|---|---|---|
| 999 |
_c60171 _d60171 |
||
| 005 | 20200604143452.0 | ||
| 008 | 200604b ||||| |||| 00| 0 eng d | ||
| 020 | _a0849379237 | ||
| 082 | _a621.3815 S19E | ||
| 100 | _aScheffer, Louis | ||
| 100 | _aLavagno, Luciano | ||
| 100 | _aMartin, Grant | ||
| 245 | _aEDA for IC System Design Verification and Testing | ||
| 260 |
_aBoca Raton _bTaylor & Fransis _c2006 |
||
| 300 | _a429p. | ||
| 650 | _bSystem Level Design | ||
| 650 | _bMicro-Architecture Design | ||
| 650 | _bDesign for Test | ||
| 650 | _bDigital Simulation | ||
| 942 | _cDBK | ||