000 | 02788nam a22005175i 4500 | ||
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001 | 978-981-15-1314-5 | ||
003 | DE-He213 | ||
005 | 20220801214201.0 | ||
007 | cr nn 008mamaa | ||
008 | 200102s2020 si | s |||| 0|eng d | ||
020 |
_a9789811513145 _9978-981-15-1314-5 |
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024 | 7 |
_a10.1007/978-981-15-1314-5 _2doi |
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050 | 4 | _aTK7867-7867.5 | |
072 | 7 |
_aTJFC _2bicssc |
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_aTEC008010 _2bisacsh |
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072 | 7 |
_aTJFC _2thema |
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082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aTaraate, Vaibbhav. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _936813 |
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245 | 1 | 0 |
_aLogic Synthesis and SOC Prototyping _h[electronic resource] : _bRTL Design using VHDL / _cby Vaibbhav Taraate. |
250 | _a1st ed. 2020. | ||
264 | 1 |
_aSingapore : _bSpringer Nature Singapore : _bImprint: Springer, _c2020. |
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300 |
_aXIX, 251 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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_atext file _bPDF _2rda |
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505 | 0 | _aIntroduction -- ASIC Design and SOC prototype -- Design using VHDL & Guidelines -- Design using VHDL & Guidelines -- Design and Verification Strategies -- VHDL Design and RTL Tweaks -- ASIC Synthesis and Design Constraints -- Design optimization -- Design optimization -- FPGA for SOC Prototype -- Prototype using Single and Multiple FPGA. . | |
520 | _aThis book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike. | ||
650 | 0 |
_aElectronic circuits. _919581 |
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650 | 0 |
_aMicroprogramming . _932081 |
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650 | 0 |
_aLogic design. _93686 |
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650 | 1 | 4 |
_aElectronic Circuits and Systems. _936814 |
650 | 2 | 4 |
_aControl Structures and Microprogramming. _932083 |
650 | 2 | 4 |
_aLogic Design. _93686 |
710 | 2 |
_aSpringerLink (Online service) _936815 |
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773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9789811513138 |
776 | 0 | 8 |
_iPrinted edition: _z9789811513152 |
776 | 0 | 8 |
_iPrinted edition: _z9789811513169 |
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-981-15-1314-5 |
912 | _aZDB-2-ENG | ||
912 | _aZDB-2-SXE | ||
942 | _cEBK | ||
999 |
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