000 04470nam a22005655i 4500
001 978-3-319-49679-5
003 DE-He213
005 20220801222355.0
007 cr nn 008mamaa
008 161229s2017 sz | s |||| 0|eng d
020 _a9783319496795
_9978-3-319-49679-5
024 7 _a10.1007/978-3-319-49679-5
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
245 1 0 _aComputing Platforms for Software-Defined Radio
_h[electronic resource] /
_cedited by Waqar Hussain, Jari Nurmi, Jouni Isoaho, Fabio Garzia.
250 _a1st ed. 2017.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2017.
300 _aXII, 240 p. 19 illus., 9 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aChapter1. The Evolution of Software Defined Radio - An Introduction -- Part I: Architectures, Designs and Implementations -- Chapter2. Design Transformation from a Single-Core to a Multi-Core Architecture targeting Massively-Parallel Signal Processing Algorithms -- Chapter3. The CoreVA-MPSoC - A Multiprocessor Platform for Software-Defined Radio -- Chapter4. Design and Implementation of IEEE 802.11a/g Receiver Blocks on a Coarse-Grained Reconfigurable Array -- Chapter5. Reconfigurable Multiprocessor Systems-on-Chip -- Chapter6. NineSilica: A Homogeneous MPSoC approach for SDR platforms -- Part II: Software-based Radio Cognition and Implementation Tools -- Chapter7. Application of the Scalable Communications Core as an SDR Baseband -- Chapter8. HW/SW Co-Design Toolset for Customization of Exposed Datapath Processors -- Chapter9. FPGA-based Cognitive Radio Platform with Reconfigurable Front-End and Antenna -- Chapter10. Synchronization in NC-OFDM-Based CR Platforms -- Chapter11. Towards Adaptive Cryptography and Security with Software Defined Platforms -- Chapter12. The Future of Software-Defined Radio-Recommendations.
520 _aThis book addresses Software-Defined Radio (SDR) baseband processing from the computer architecture point of view, providing a detailed exploration of different computing platforms by classifying different approaches, highlighting the common features related to SDR requirements and by showing pros and cons of the proposed solutions. Coverage includes architectures exploiting parallelism by extending single-processor environment (such as VLIW, SIMD, TTA approaches), multi-core platforms distributing the computation to either a homogeneous array or a set of specialized heterogeneous processors, and architectures exploiting fine-grained, coarse-grained, or hybrid reconfigurability. Describes a computer engineering approach to SDR baseband processing hardware; Discusses implementation of numerous compute-intensive signal processing algorithms on single and multicore platforms; Enables deep understanding of optimization techniques related to power and energy consumption of multicore platforms using several basic and high-level performance indicators; Includes prototyping details of single and multicore platforms on ASICs and FPGAs.
650 0 _aElectronic circuits.
_919581
650 0 _aSignal processing.
_94052
650 0 _aMicroprocessors.
_961143
650 0 _aComputer architecture.
_93513
650 1 4 _aElectronic Circuits and Systems.
_961144
650 2 4 _aSignal, Speech and Image Processing .
_931566
650 2 4 _aProcessor Architectures.
_961145
700 1 _aHussain, Waqar.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_961146
700 1 _aNurmi, Jari.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_961147
700 1 _aIsoaho, Jouni.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_961148
700 1 _aGarzia, Fabio.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_961149
710 2 _aSpringerLink (Online service)
_961150
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783319496788
776 0 8 _iPrinted edition:
_z9783319496801
776 0 8 _iPrinted edition:
_z9783319842134
856 4 0 _uhttps://doi.org/10.1007/978-3-319-49679-5
912 _aZDB-2-ENG
912 _aZDB-2-SXE
942 _cEBK
999 _c80698
_d80698