000 | 03971nam a22005175i 4500 | ||
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001 | 978-3-031-01870-1 | ||
003 | DE-He213 | ||
005 | 20240730163737.0 | ||
007 | cr nn 008mamaa | ||
008 | 220601s2019 sz | s |||| 0|eng d | ||
020 |
_a9783031018701 _9978-3-031-01870-1 |
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024 | 7 |
_a10.1007/978-3-031-01870-1 _2doi |
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050 | 4 | _aTK5105.5-5105.9 | |
072 | 7 |
_aUKN _2bicssc |
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_aCOM043000 _2bisacsh |
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072 | 7 |
_aUKN _2thema |
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082 | 0 | 4 |
_a004.6 _223 |
100 | 1 |
_aSadoghi, Mohammad. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _980326 |
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245 | 1 | 0 |
_aTransaction Processing on Modern Hardware _h[electronic resource] / _cby Mohammad Sadoghi, Spyros Blanas. |
250 | _a1st ed. 2019. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2019. |
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300 |
_aXV, 122 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aSynthesis Lectures on Data Management, _x2153-5426 |
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505 | 0 | _aIntroduction -- Transaction Concepts -- Multi-Version Concurrency Revisited -- Coordination-Avoidance Concurrency -- Novel Transactional System Architectures -- Hardware-Assisted Transactional Utilities -- Transactions on Heterogeneous Hardware -- Outlook: The Era of Hardware Specialization and Beyond -- Bibliography -- Authors' Biographies. | |
520 | _aThe last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause to fundamentally rethink the architecture of database systems. The data storage lexicon has now expanded beyond spinning disks and RAID levels to include the cache hierarchy, memory consistency models, cache coherence and write invalidation costs, NUMA regions, and coherence domains. New memory technologies promise fast non-volatile storage and expose unchartered trade-offs for transactional durability, such as exploiting byte-addressable hot and cold storage through persistent programming that promotes simpler recovery protocols. In the meantime, the plateauing single-threaded processor performance has brought massive concurrency within a single node, first in the form of multi-core, andnow with many-core and heterogeneous processors. The exciting possibility to reshape the storage, transaction, logging, and recovery layers of next-generation systems on emerging hardware have prompted the database research community to vigorously debate the trade-offs between specialized kernels that narrowly focus on transaction processing performance vs. designs that permit transactionally consistent data accesses from decision support and analytical workloads. In this book, we aim to classify and distill the new body of work on transaction processing that has surfaced in the last decade to navigate researchers and practitioners through this intricate research subject. | ||
650 | 0 |
_aComputer networks . _931572 |
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650 | 0 |
_aData structures (Computer science). _98188 |
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650 | 0 |
_aInformation theory. _914256 |
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650 | 1 | 4 |
_aComputer Communication Networks. _980327 |
650 | 2 | 4 |
_aData Structures and Information Theory. _931923 |
700 | 1 |
_aBlanas, Spyros. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _980328 |
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710 | 2 |
_aSpringerLink (Online service) _980329 |
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773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783031000973 |
776 | 0 | 8 |
_iPrinted edition: _z9783031007422 |
776 | 0 | 8 |
_iPrinted edition: _z9783031029981 |
830 | 0 |
_aSynthesis Lectures on Data Management, _x2153-5426 _980330 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-031-01870-1 |
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942 | _cEBK | ||
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