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020 _a9783319216683
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024 7 _a10.1007/978-3-319-21668-3
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072 7 _aUYA
_2bicssc
072 7 _aCOM014000
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072 7 _aUYA
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082 0 4 _a004.0151
_223
245 1 0 _aComputer Aided Verification
_h[electronic resource] :
_b27th International Conference, CAV 2015, San Francisco, CA, USA, July 18-24, 2015, Proceedings, Part II /
_cedited by Daniel Kroening, Corina S. Păsăreanu.
250 _a1st ed. 2015.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2015.
300 _aXVIII, 469 p. 107 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
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490 1 _aTheoretical Computer Science and General Issues,
_x2512-2029 ;
_v9207
505 0 _aSMT Techniques and Applications -- POLING: SMT Aided Linearizability Proofs -- Finding Bounded Path in Graph Using SMT for Automatic Clock Routing -- Cutting the Mix -- The Inez Mathematical Programming Modulo Theories Framework -- Using Minimal Correction Sets to More Efficiently Compute Minimal Unsatisfiable Sets -- Deciding Local Theory Extensions via E-matching -- HW Verification -- Modular Deductive Verification of Multiprocessor Hardware Designs -- Word-Level Symbolic Trajectory Evaluation -- Verifying Linearizability of Intel® Software Guard Extensions -- Synthesis Synthesis Through Unification -- From Non-preemptive to Preemptive Scheduling Using Synchronization Synthesis -- Counterexample-Guided Quantifier Instantiation for Synthesis in SMT -- Deductive Program Repair -- Quantifying Conformance Using the Skorokhod Metric -- Pareto Curves of Multidimensional Mean-Payoff Games -- Termination -- Conflict-Driven Conditional Termination -- Predicate Abstraction and CEGAR for Disproving Termination ofHigher-Order Functional Programs -- Complexity of Bradley-Manna-Sipma Lexicographic Ranking Functions -- Measuring with Timed Patterns -- Automatic Verification of Stability and Safety for Delay Differential Equations -- Time Robustness in MTL and Expressivity in Hybrid System Falsification -- Concurrency -- Adaptive Concretization for Parallel Program Synthesis -- Automatic Completion of Distributed Protocols with Symmetry -- An Axiomatic Specification for Sequential Memory Models -- Approximate Synchrony: An Abstraction for Distributed Almost-Synchronous Systems -- Automated and Modular Refinement Reasoning for Concurrent Programs.
520 _aThe two-volume set LNCS 9206 and LNCS 9207 constitutes the refereed proceedings of the 27th International Conference on Computer Aided Verification, CAV 2015, held in San Francisco, CA, USA, in July 2015. The total of 58 full and 11 short papers presented in the proceedings was carefully reviewed and selected from 252 submissions. The papers were organized in topical sections named: model checking and refinements; quantitative reasoning; software analysis; lightning talks; interpolation, IC3/PDR, and Invariants; SMT techniques and applications; HW verification; synthesis; termination; and concurrency.
650 0 _aComputer science.
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650 0 _aSoftware engineering.
_94138
650 0 _aMachine theory.
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650 0 _aComputer engineering.
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650 0 _aComputer networks .
_931572
650 1 4 _aComputer Science Logic and Foundations of Programming.
_942203
650 2 4 _aSoftware Engineering.
_94138
650 2 4 _aFormal Languages and Automata Theory.
_9132578
650 2 4 _aComputer Engineering and Networks.
_9132579
700 1 _aKroening, Daniel.
_eeditor.
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700 1 _aPăsăreanu, Corina S.
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_4http://id.loc.gov/vocabulary/relators/edt
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710 2 _aSpringerLink (Online service)
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773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
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776 0 8 _iPrinted edition:
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830 0 _aTheoretical Computer Science and General Issues,
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_v9207
_9132583
856 4 0 _uhttps://doi.org/10.1007/978-3-319-21668-3
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