000 03432nam a22005295i 4500
001 978-3-540-77966-7
003 DE-He213
005 20240730184635.0
007 cr nn 008mamaa
008 100301s2008 gw | s |||| 0|eng d
020 _a9783540779667
_9978-3-540-77966-7
024 7 _a10.1007/978-3-540-77966-7
_2doi
050 4 _aQA76.758
072 7 _aUMZ
_2bicssc
072 7 _aCOM051230
_2bisacsh
072 7 _aUMZ
_2thema
082 0 4 _a005.1
_223
245 1 0 _aHardware and Software: Verification and Testing
_h[electronic resource] :
_bThird International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007, Proceedings /
_cedited by Karen Yorav.
250 _a1st ed. 2008.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2008.
300 _aXII, 267 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aProgramming and Software Engineering,
_x2945-9168 ;
_v4899
505 0 _aInvited Talks -- Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless -- Scaling Commercial Verification to Larger Systems -- From Hardware Verification to Software Verification: Re-use and Re-learn -- Where Do Bugs Come from? -- HVC Award -- Symbolic Execution and Model Checking for Testing -- Hardware Verification -- On the Characterization of Until as a Fixed Point Under Clocked Semantics -- Reactivity in SystemC Transaction-Level Models -- Model Checking -- Verifying Parametrised Hardware Designs Via Counter Automata -- How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison -- Dynamic Hardware Verification -- Constraint Patterns and Search Procedures for CP-Based Random Test Generation -- Using Virtual Coverage to Hit Hard-To-Reach Events -- Merging Formal and Testing -- Test Case Generation for Ultimately Periodic Paths -- Dynamic Testing Via Automata Learning -- Formal Verification for Software -- On the Architecture of System Verification Environments -- Exploiting Shared Structure in Software Verification Conditions -- Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code -- A Complete Bounded Model Checking Algorithm for Pushdown Systems -- Software Testing -- Locating Regression Bugs -- The Advantages of Post-Link Code Coverage -- GenUTest: A Unit Test and Mock Aspect Generation Tool.
650 0 _aSoftware engineering.
_94138
650 0 _aComputer science.
_99832
650 0 _aCompilers (Computer programs).
_93350
650 1 4 _aSoftware Engineering.
_94138
650 2 4 _aComputer Science Logic and Foundations of Programming.
_942203
650 2 4 _aCompilers and Interpreters.
_931853
700 1 _aYorav, Karen.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9136162
710 2 _aSpringerLink (Online service)
_9136163
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540779643
776 0 8 _iPrinted edition:
_z9783540847434
830 0 _aProgramming and Software Engineering,
_x2945-9168 ;
_v4899
_9136164
856 4 0 _uhttps://doi.org/10.1007/978-3-540-77966-7
912 _aZDB-2-SCS
912 _aZDB-2-SXCS
912 _aZDB-2-LNC
942 _cELN
999 _c92409
_d92409