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020			_a9783540850533 _9978-3-540-85053-3
024	7		_a10.1007/978-3-540-85053-3 _2doi
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245	1	0	_aCryptographic Hardware and Embedded Systems - CHES 2008 _h[electronic resource] : _b10th International Workshop, Washington, D.C., USA, August 10-13, 2008, Proceedings / _cedited by Elisabeth Oswald, Pankaj Rohatgi.
250			_a1st ed. 2008.
264		1	_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2008.
300			_aXIII, 445 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aSecurity and Cryptology, _x2946-1863 ; _v5154
505	0		_aSide-Channel Analysis 1 -- Attack and Improvement of a Secure S-Box Calculation Based on the Fourier Transform -- Collision-Based Power Analysis of Modular Exponentiation Using Chosen-Message Pairs -- Multiple-Differential Side-Channel Collision Attacks on AES -- Implementations 1 -- Time-Area Optimized Public-Key Engines: -Cryptosystems as Replacement for Elliptic Curves? -- Ultra High Performance ECC over NIST Primes on Commercial FPGAs -- Exploiting the Power of GPUs for Asymmetric Cryptography -- Fault Analysis 1 -- High-Performance Concurrent Error Detection Scheme for AES Hardware -- A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis -- RSA with CRT: A New Cost-Effective Solution to Thwart Fault Attacks -- Random Number Generation -- A Design for a Physical RNG with Robust Entropy Estimators -- Fast Digital TRNG Based on Metastable Ring Oscillator -- Efficient Helper Data Key Extractor on FPGAs -- Side-Channel Analysis 2 -- The Carry Leakage on the Randomized Exponent Countermeasure -- Recovering Secret Keys from Weak Side Channel Traces of Differing Lengths -- Attacking State-of-the-Art Software Countermeasures-A Case Study for AES -- Cryptography and Cryptanalysis -- Binary Edwards Curves -- A Real-World Attack Breaking A5/1 within Hours -- Hash Functions and RFID Tags: Mind the Gap -- Implementations 2 -- A New Bit-Serial Architecture for Field Multiplication Using Polynomial Bases -- A Very Compact Hardware Implementation of the MISTY1 Block Cipher -- Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography -- Fault Analysis 2 -- Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration -- RFID and Its Vulnerability to Faults -- Perturbating RSA Public Keys: An Improved Attack -- Side-Channel Analysis 3 -- DividedBackend Duplication Methodology for Balanced Dual Rail Routing -- Using Subspace-Based Template Attacks to Compare and Combine Power and Electromagnetic Information Leakages -- Mutual Information Analysis -- Invited Talks -- RSA-Past, Present, Future -- A Vision for Platform Security.
520			_aThis book constitutes the refereed proceedings of the 10th Interntaional Workshop on Cryptographic Hardware and Embedded Systems, CHES 2008, held in Washington, D.C., USA, during August 10-13, 2008. The book contains 2 invited talks and 27 revised full papers which were carefully reviewed and selected from 107 submissions. The papers are organized in topical sections on side channel analysis, implementations, fault analysis, random number generation, and cryptography and cryptanalysis.
650		0	_aCryptography. _91973
650		0	_aData encryption (Computer science). _99168
650		0	_aData protection. _97245
650		0	_aCoding theory. _94154
650		0	_aInformation theory. _914256
650		0	_aAlgorithms. _93390
650		0	_aComputers, Special purpose. _946653
650		0	_aComputer networks . _931572
650	1	4	_aCryptology. _931769
650	2	4	_aData and Information Security. _931990
650	2	4	_aCoding and Information Theory. _9155808
650	2	4	_aAlgorithms. _93390
650	2	4	_aSpecial Purpose and Application-Based Systems. _946654
650	2	4	_aComputer Communication Networks. _9155809
700	1		_aOswald, Elisabeth. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9155810
700	1		_aRohatgi, Pankaj. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9155811
710	2		_aSpringerLink (Online service) _9155812
773	0		_tSpringer Nature eBook
776	0	8	_iPrinted edition: _z9783540850526
776	0	8	_iPrinted edition: _z9783540873068
830		0	_aSecurity and Cryptology, _x2946-1863 ; _v5154 _9155813
856	4	0	_uhttps://doi.org/10.1007/978-3-540-85053-3
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