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020 _a9783540705505
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024 7 _a10.1007/978-3-540-70550-5
_2doi
050 4 _aQA76.9.S88
072 7 _aUYD
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072 7 _aCOM011000
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082 0 4 _a004.2
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245 1 0 _aEmbedded Computer Systems: Architectures, Modeling, and Simulation
_h[electronic resource] :
_b8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /
_cedited by Mladen Berekovic, Nikitas Dimopoulos, Stephan Wong.
250 _a1st ed. 2008.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2008.
300 _aXVI, 300 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
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490 1 _aTheoretical Computer Science and General Issues,
_x2512-2029 ;
_v5114
505 0 _aBeachnote -- Can They Be Fixed: Some Thoughts After 40 Years in the Business -- Architecture -- On the Benefit of Caching Traffic Flow Data in the Link Buffer -- Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic -- Scalable Architecture for Prefix Preserving Anonymization of IP Addresses -- New Frontiers -- Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology -- Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications -- 802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec -- SoC -- A Real-Time Programming Model for Heterogeneous MPSoCs -- A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation -- A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs -- Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors -- Application Specific -- Area Reliability Trade-Off in Improved Reed Muller Coding -- Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set -- ASIP-eFPGA Architecture for Multioperable GNSS Receivers -- Special Session: System Level Design for Heterogeneous Systems -- to System Level Design for Heterogeneous Systems -- Streaming Systems in FPGAs -- Heterogeneous Design in Functional DIF -- Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study -- Evaluation of ASIPs Design with LISATek -- High Level Loop Transformations for Systematic Signal Processing Embedded Applications -- Memory-Centric Hardware Synthesis from Dataflow Models -- Special Session: Programming Multicores -- to Programming Multicores -- Design Issuesin Parallel Array Languages for Shared Memory -- An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency -- Sensors and Sensor Networks -- Climate and Biological Sensor Network -- Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors -- Application Server for Wireless Sensor Networks -- Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks -- System Modeling and Design -- Signature-Based Calibration of Analytical System-Level Performance Models -- System-Level Design Space Exploration of Dynamic Reconfigurable Architectures -- Intellectual Property Protection for Embedded Sensor Nodes.
520 _aThis book constitutes the refereed proceedings of the 8th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2008, held in Samos, Greece, in July 2008. The 24 revised full papers presented together with a contamplative keynote and additional papers of two special workshop sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on architecture, new frontiers, SoC, application specific contributions, system level design for heterogeneous systems, programming multicores, sensors and sensor networks; and systems modeling and design.
650 0 _aComputer systems.
_9162735
650 0 _aComputer networks .
_931572
650 0 _aComputer science.
_99832
650 0 _aComputers.
_98172
650 0 _aMicroprocessors.
_9162736
650 0 _aComputer architecture.
_93513
650 0 _aElectronic digital computers
_xEvaluation.
_921495
650 1 4 _aComputer System Implementation.
_938514
650 2 4 _aComputer Communication Networks.
_9162737
650 2 4 _aTheory of Computation.
_9162738
650 2 4 _aComputer Hardware.
_933420
650 2 4 _aProcessor Architectures.
_9162739
650 2 4 _aSystem Performance and Evaluation.
_932047
700 1 _aBerekovic, Mladen.
_eeditor.
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_4http://id.loc.gov/vocabulary/relators/edt
_9162740
700 1 _aDimopoulos, Nikitas.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9162741
700 1 _aWong, Stephan.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9162742
710 2 _aSpringerLink (Online service)
_9162743
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540705499
776 0 8 _iPrinted edition:
_z9783540866510
830 0 _aTheoretical Computer Science and General Issues,
_x2512-2029 ;
_v5114
_9162744
856 4 0 _uhttps://doi.org/10.1007/978-3-540-70550-5
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