Zhan, Naijun.

Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach / [electronic resource] : by Naijun Zhan, Shuling Wang, Hengjun Zhao. - 1st ed. 2017. - XV, 258 p. 74 illus., 60 illus. in color. online resource.

1 Introduction -- 2 Preliminaries -- 3 Unifying Theories of Programming -- 4 Simulink -- 5 Stateflow and Its Combination with Simulink -- 6 Hybrid CSP -- 7 Hybrid Hoare Logic -- 8 The HHL Prover -- 9 Invariant Generation -- 10 Translating Simulink Diagrams into HCSP -- 11 Translating Simulink/Stateflow Diagrams into HCSP -- 12 From HCSP to Simulink -- 13 MARS A Toolkit for Modelling, Analysis and Verification of Hybrid Systems -- 14 Case Studies.

This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful specification logic and deduction-based verification approach, and some impressive, realistic case studies. Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal verification of Simulink/Stateflow diagrams. They will also gain some basic ideas about fundamental elements of formal methods such as formal syntax and semantics, and especially the common techniques applied in formal modelling and verification of hybrid systems. By investigating the successful case studies, readers will realize how to apply the pure theory and techniques to real applications, and hopefully will be inspired to start to use the proposed approach, or even develop their own formal methods in their future work.

9783319470160

10.1007/978-3-319-47016-0 doi


Electronic circuits.
Microprocessors.
Computer architecture.
Electronic Circuits and Systems.
Processor Architectures.

TK7867-7867.5

621.3815