Efficient Processing of Deep Neural Networks [electronic resource] / by Vivienne Sze, Yu-Hsin Chen, Tien-Ju Yang, Joel S. Emer.
By: Sze, Vivienne [author.].
Contributor(s): Chen, Yu-Hsin [author.] | Yang, Tien-Ju [author.] | Emer, Joel S [author.] | SpringerLink (Online service).
Material type: BookSeries: Synthesis Lectures on Computer Architecture: Publisher: Cham : Springer International Publishing : Imprint: Springer, 2020Edition: 1st ed. 2020.Description: XXI, 254 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783031017667.Subject(s): Electronic circuits | Microprocessors | Computer architecture | Electronic Circuits and Systems | Processor ArchitecturesAdditional physical formats: Printed edition:: No title; Printed edition:: No title; Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access onlinePreface -- Acknowledgments -- Introduction -- Overview of Deep Neural Networks -- Key Metrics and Design Objectives -- Kernel Computation -- Designing DNN Accelerators -- Operation Mapping on Specialized Hardware -- Reducing Precision -- Exploiting Sparsity -- Designing Efficient DNN Models -- Advanced Technologies -- Conclusion -- Bibliography -- Authors' Biographies.
This book provides a structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks (DNNs). DNNs are currently widely used for many artificial intelligence (AI) applications, including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Therefore, techniques that enable efficient processing of deep neural networks to improve key metrics-such as energy-efficiency, throughput, and latency-without sacrificing accuracy or increasing hardware costs are critical to enabling the wide deployment of DNNs in AI systems. The book includes background on DNN processing; a description and taxonomy of hardware architectural approaches for designing DNN accelerators; key metrics for evaluating and comparing different designs; features of DNN processing that are amenable to hardware/algorithm co-design to improve energy efficiency and throughput; and opportunities for applying new technologies. Readers will find a structured introduction to the field as well as formalization and organization of key concepts from contemporary work that provide insights that may spark new ideas.
There are no comments for this item.