Spacer engineered FinFET architectures : high-performance digital circuit applicators / by Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal.
By: Dasgupta, Sudeb [author.]
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Contributor(s): Kaushik, Brajesh Kumar [author.] | Pal, Pankaj Kumar [author.] | Taylor and Francis.
Material type: 
BookPublisher: Boca Raton, FL : Routledge, an imprint of Taylor and Francis, 2017Edition: First edition.Description: 1 online resource (138 pages) : 49 illustrations.ISBN: 9781315191089; 9781351751025; 9781351751049.Subject(s): Metal oxide semiconductor field-effect transistors | Silicon-on-insulator technologyAdditional physical formats: Print version: : No titleDDC classification: 621.3815/284 Online resources: Click here to view. chapter 1 Introduction to Nanoelectronics -- chapter 2 Tri-Gate FinFET Technology and Its Advancement -- chapter 3 Dual-k Spacer Device Architecture and Its Electrostatics -- chapter 4 Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design -- chapter 5 Design Metric Improvement of a Dual-k Based SRAM Cell -- chapter 6 Statistical Variability and Sensitivity Analysis.
This book focusses on the spacer engineering aspects of novel MOS-based device circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
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